Z8927320VSC Datasheet, PDF (54/60 Pages) Zilog, Inc. – 16-BIT DIGITAL SIGNAL PROCESSORS WITH A/D CONVERTER

Z89223/273/323/373
16-Bit Digital Signal Processors with A/D Converter
INSTRUCTION DESCRIPTIONS (Continued)
Inst.
XOR
Description Synopsis
Bitwise
XOR <dest>,<src>
exclusive OR
Operands
A,<pregs>
A,<dregs>
A,<limm>
A,<memind>
A,<direct>
A,<regind>
A,<hwregs>
A,<simm>
ZiLOG
Words Cycles Examples
1
1
XOR A,P2:0
1
1
XOR A,D0:1
2
2
XOR A,#13933
1
3
XOR A,@@P2:1+
1
1
XOR A,%2F
1
1
XOR A,@P2:0
1
1
XOR A,BUS
1
1
XOR A, #%12
Bank Switch Operand. The third (optional) operand of
the MLD, MPYA and MPYS instructions represents wheth-
er the bank switch is set to ON or OFF. To illustrate, the
keywords ON and OFF are used to state the direction of the
switch. These keywords are referenced in the instruction de-
scriptions through the <bank switch> symbol. The most no-
table capability is that a source operand can be multiplied
by itself (squared).
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DS000202-DSP0599