Z8927320VSC Datasheet, PDF (49/60 Pages) Zilog, Inc. – 16-BIT DIGITAL SIGNAL PROCESSORS WITH A/D CONVERTER

ZiLOG
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16-Bit Digital Signal Processors with A/D Converter
INSTRUCTION SET
The addressing modes are:
<pregs>, <hwregs>. These modes are used for loads to
and from registers within the chip, such as loading to the
accumulator, or loading from a pointer register. The names
of the registers are specified in the operand field (destination
first, then source).
<dregs>. This mode is used for access to the lower 16 ad-
dresses in each bank of RAM. The 4-bit address comes from
2 bits of the status register and 2 bits of the operand field
of the data pointer. Data registers can be used to access data
in RAM, but typically are used as pointers to access data
from the program memory.
<accind>. Similar to the previous mode, the address for the
program memory read is stored in the Accumulator. Hence,
@A in the second operand field loads the number in mem-
ory specified by the address in A.
<direct>. The direct mode allows read or write to data RAM
from the Accumulator by specifying the absolute address
of the RAM in the operand of the instruction. A number be-
tween 0 and 255 indicates a location in RAM bank 0, and
a number between 256 and 511 indicates a location in RAM
bank 1.
<limm>. This address mode indicates a long immediate op-
erand. A 16-bit word can be loaded directly from the oper-
and into the specified register or memory location.
<simm>. This address mode indicates a short immediate
operand. It is used to load 8-bit data into the specified RAM
pointer.
<regind>. This mode is used for indirect access to the data
RAM. The address of the RAM location is stored in the
pointer. The “@” symbol indicates “indirect” and precedes
the pointer. For example, @P1:1 refers to the location in
RAM bank 1 specified by the value in the pointer.
<memind>. This mode is used for indirect access to the
program memory. The address of the memory is located in
a RAM location, which is specified by the value in a pointer.
Therefore, @@P1:1 instructs the processor to read from a
location in memory, which is specified by a value in RAM,
and the location of the RAM is in turn specified by the value
in the pointer.
Note: the data pointer can also be used for a memory access in
this manner, but only one “@” precedes the pointer. In
both cases, each time the addressing mode is used, the
memory address stored in RAM is incremented by one
to allow easy transfer of sequential data from program
memory.
Symbolic Name
<pregs>
<dregs> (points to RAM)
<hwregs>
<accind> (points to Program
Memory)
<direct>
<limm>
<simm>
<regind> (points to RAM)
<memind> (points to Program
Memory)
Table 24. Instruction Set Addressing Modes
Syntax
Description
Pn:b
Pointer Registers
Dn:b
Data Registers
X, Y, PC, SR, P, EDn, A, BUS Hardware Registers
@A
Accumulator Memory Indirect
<expression>
#<const exp>
#<const exp>
@Pn:b
@Pn:b+
@Pn:b–LOOP
@Pn:b+LOOP
@@Pn:b
Direct Address Expression
Long (16-bit) Immediate Value
Short (8-bit) Immediate Value
Pointer Register Indirect
Pointer Register Indirect with Increment
Pointer Register Indirect with Loop
Decrement
Pointer register Indirect with Loop Increment
Pointer Register Memory Indirect
@Dn:b
@@Pn:b–LOOP
@@Pn:b+LOOP
@@Pn:b+
Data Register Memory Indirect
Pointer Register Memory Indirect with Loop
Decrement
Pointer Register Memory Indirect with Loop
Increment
Pointer Register Memory Indirect with
Increment
DS000202-DSP0599
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