Z8927320VSC Datasheet, PDF(35/60 Page) Zilog, Inc. – 16-BIT DIGITAL SIGNAL PROCESSORS WITH A/D CONVERTER

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Z8927320VSC Datasheet, PDF (35/60 Pages) Zilog, Inc. – 16-BIT DIGITAL SIGNAL PROCESSORS WITH A/D CONVERTER

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ZiLOG

Z89223/273/323/373

16-Bit Digital Signal Processors with A/D Converter

Port1Ã8-Bit Programmable I/O

Bank15/EXT1 is the Port1 control register. The MSB is the

Port1 direction control. Port1 data is accessed as the LSB

of EXT5 in Banks 0, 1, or 5. The Port1 pins can also be

mapped to internal functions. When INT2, CLKOUT, UI0

and UI1, or the SPI are enabled, they use Port1 pins. The

44-pin packages do not feature Port1 pins, however, Port1

and its internal functions can be mapped to the MSB of the

ED Bus/Port0 pins. See bits 2â0 of Bank15/EXT1.

Table 16. Port1 Bit Function Allocation

Port Pin

P1.0/INT2

P1.1/CLKOUT

P1.2/SDI

P1.3/SDO

P1.4/SS

P1.5/SCLK

P1.6/UI0

P1.7/UI1

Bank15/EXT1 Bit 3 = 1

Bank15/EXT1 Bit 5 = 1

Bank15/EXT4 Bit 0 = 1

Bank13/EXT1 Bits [2,1] = 10, or

Bank14/EXT1 Bits [2,1] = 10

Bank13/EXT1 Bits [2,1] = 11, or

Bank14/EXT1 Bits [2,1] = 11

Condition

Enable INT2

Enable CLKOUT

Enable SPI

Enable UI0

Enable UI1

Then

INT2

CLKOUT

SDI

SDO

SCLK

UI0

UI1

Else

P1.0

P1.1

P1.2

P1.3

P1.4

P1.5

P1.6

P1.7

DS000202-DSP0599

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