Z8927320VSC Datasheet, PDF (26/60 Pages) Zilog, Inc. – 16-BIT DIGITAL SIGNAL PROCESSORS WITH A/D CONVERTER

Z89223/273/323/373
16-Bit Digital Signal Processors with A/D Converter
ZiLOG
MEMORY MAP
Program Memory. Programs of up to 8K words can be
masked into internal ROM (Z89323) or programmed into
OTP (Z89373). Four locations are dedicated to the vector
addresses for the three interrupt service routines
(1FFDH–1FFFH) and for the starting address following a
RESET (1FFCH). Internal ROM is mapped from 0000H to
1FFFH, and the highest location for program instructions
is 1FFBH.
Internal Data RAM. All Z893x3 family members feature
internal 512 x 16-bit data RAM organized as two banks of
256 x 16-bit words each (RAM0 and RAM1). The three ad-
dressing modes available to access the data RAM are direct
addressing, short form direct, and register indirect.
The contents of both data RAM banks can be read simul-
taneously and loaded into the X and Y inputs of the multi-
plier during a multiply instruction.
The addresses for each data RAM bank are:
0Ð255 (0000HÐ00FFH) for RAM0
256Ð511 (0100HÐ01FFH) for RAM1
Data RAM Pointers. In register indirect, each data RAM
bank is addressed by one of three data RAM address point-
ers:
Example: Pn:b, where
n = pointer number = 0, 1, or 2
b = bank = 0 or 1,
In auto-increment, loop-increment, and loop-decrement in-
direct addressing, the pointer is automatically modified.
The data RAM pointers, which may be read or written di-
rectly, are 8-bit registers connected to the lower byte of the
internal 16-bit DDATA Bus.
Program Memory Pointers. The first 16 locations of each
data RAM bank can be used as pointers to locations in Pro-
gram Memory. These pointers provide an efficient way to
address coefficients. The programmer selects a pointer lo-
cation using two bits in the status register and two bits in
the operand. At any one time, there are eight usable pointers,
four per bank, and the four pointers are in consecutive lo-
cations.
Example: Dn:b, where
n = pointer number = 0, 1, 2, or 3
b = bank = 0 or 1,
thus,
D0:0, D1:0, D2:0, D3:0 for RAM0
D0:1, D1:1, D2:1, D3:1 for RAM1
If S3/S4 = 01 in the status register, then
D0:0/D1:0/D2:0/D3:0 refer to register locations
4/5/6/7 in data RAM Bank 0.
thus,
P0:0, P1:0, P2:0 for RAM0
P0:1, P1:1, P2:1 for RAM1
Data Memory
FFFF
Not Used
DRAM1
DRAM0
On-Chip Memory
512 words
01FF
0100
00FF
0000
Program Memory
FFFF
FFFC
Not Used
Or
8 KW
ISR0-ISR2 Vectors ^1FFF-D
RESET Vector
1FFC
1FFB
0000
On-Chip Memory
Figure 18. Memory Map
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DS000202-DSP0599