XC3S50A-4FTG256C Datasheet, PDF (67/132 Pages) Xilinx, Inc – Architectural and Configuration Overview

Pinout Descriptions
.
Table 59: Maximum User I/O by Package
Device
Package
Maximum
User I/Os
and
Input-Only
Maximum
Input-
Only
Maximum
Differential
Pairs
I/O
All Possible I/Os by Type
INPUT DUAL VREF CLK
XC3S50A
68
6
60
17
2
20
6
23
VQ100
XC3S200A
68
6
60
17
2
20
6
23
XC3S50A
TQ144
108
7
50
42
2
26
8
30
XC3S50A
144
32
64
53
20
26
15
30
XC3S200A
195
35
90
69
21
52
21
32
XC3S400A
FT256
195
35
90
69
21
52
21
32
XC3S700A
161
13
60
59
2
52
18
30
XC3S1400A
161
13
60
59
2
52
18
30
XC3S200A
248
56
112
101
40
52
23
32
FG320
XC3S400A
251
59
112
101
42
52
24
32
XC3S400A
311
63
142
155
46
52
26
32
FG400
XC3S700A
311
63
142
155
46
52
26
32
XC3S700A
372
84
165
194
61
52
33
32
FG484
XC3S1400A
375
87
165
195
62
52
34
32
XC3S1400A
FG676
502
94
227
313
67
52
38
32
Notes:
1. Some VREFs are on INPUT pins. See pinout tables for details.
N.C.
0
0
0
51
0
0
0
0
3
0
0
0
3
0
17
Electronic versions of the package pinout tables and foot-
prints are available for download from the Xilinx website.
Using a spreadsheet program, the data can be sorted and
reformatted according to any specific needs. Similarly, the
ASCII-text file is easily parsed by most scripting programs.
http://www.xilinx.com/support/documentation/data_sheets/
s3a_pin.zip
DS529-4 (v2.0) August 19, 2010
www.xilinx.com
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