XC3S50A-4FTG256C Datasheet, PDF(118/132 Page) Xilinx, Inc – Architectural and Configuration Overview

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XC3S50A-4FTG256C Datasheet, PDF (118/132 Pages) Xilinx, Inc – Architectural and Configuration Overview

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Pinout Descriptions

12

I/O

L18P_0

GCLK6

13

I/O

L16N_0

14

I/O

L13N_0

Bank 0

15 16 17

I/O

L12N_0

VREF_0

I/O

L12P_0

I/O

L10N_0

18

I/O

L05N_0

19

I/O

L06N_0

20

I/O

L03N_0

21

TCK

22

GND A

GND

I/O VCCO_0 I/O

L16P_0

L13P_0

GND

I/O

I/O

VCCO_0 L06P_0

L10P_0

VREF_0

I/O

L03P_0

I/O

L45N_1

A23

I/O

L45P_1 B

A22

I/O

L17P_0

GCLK4

I/O

L15N_0

I/O

L09P_0

I/O

L11N_0

I/O

L08N_0

I/O

L07N_0

I/O

L05P_0

I/O

L02N_0

GND

I/O

I/O

L44N_1 L44P_1 C

A21

A20

VCCAUX I/O

L15P_0

GND

I/O

L11P_0

I/O

L08P_0

I/O

L07P_0

I/O

L01N_0

I/O

L02P_0

VREF_0

I/O

L42N_1

I/O

L42P_1

I/O D

L41N_1

I/O

L17N_0

GCLK5

I/O

L14N_0

I/O

L09N_0

I/O

L04P_0

INPUT

I/O VCCAUX

L01P_0

TDO

I/O VCCO_1 I/O E

L38P_1

L41P_1

INPUT I/O VCCO_0 I/O INPUT

L14P_0

L04N_0

GND

I/O

L40N_1

I/O

L40P_1

I/O

L38N_1

I/O

L34N_1

A19

I/O

L34P_1

A18

F

INPUT

INPUT

INPUT

INPUT

INPUT

I/O

L46N_1

A25

I/O

L46P_1

A24

I/O

L36P_1

I/O

L36N_1

GND

I/O

L30N_1 G

A15

INPUT INPUT

VREF_0

INPUT

INPUT

L47N_1

INPUT INPUT

L47P_1

VREF_1 L39P_1

INPUT

L39N_1

I/O

L37N_1

I/O

L33N_1

A17

I/O

L33P_1

A16

I/O

L30P_1 H

A14

VCCINT GND

GND

INPUT

L43N_1

VREF_1

INPUT

L43P_1

VCCO_1

I/O

L37P_1

GND

I/O

I/O

I/O

L29N_1 L29P_1 L26N_1 J

A13

A12

A11

GND

INPUT

VCCINT L35P_1

VREF_1

INPUT

L35N_1

VCCINT GND VCCINT INPUT

L31P_1

INPUT

L31N_1

INPUT

L27N_1

I/O

L32P_1

GND

I/O

L32N_1

I/O

L28P_1

I/O

L25N_1

RHCLK7

I/O

L28N_1

I/O

I/O

L25P_1

IRDY1

VCCO_1

L26P_1

K

RHCLK6

A10

I/O

I/O

I/O

L22N_1

TRDY1

L22P_1

L21N_1

L

RHCLK3 RHCLK2 RHCLK1

GND VCCINT GND

INPUT

L27P_1

VREF_1

INPUT

L23N_1

INPUT

L23P_1

I/O

I/O

L24P_1 VCCAUX L24N_1

RHCLK4

RHCLK5

GND

I/O

L21P_1 M

RHCLK0

VCCINT

GND

VCCINT INPUT

L16P_1

INPUT

L16N_1

VREF_1

I/O

L20N_1

A9

I/O

L20P_1

A8

I/O

L19N_1

A7

I/O

L19P_1

A6

I/O

L18N_1

A5

I/O

L18P_1 N

A4

INPUT VCCINT GND

INPUT

L08P_1

INPUT

L08N_1

VCCO_1

I/O

L17N_1

A3

GND

I/O

I/O

VCCO_1 L15N_1 P

L15P_1

VREF_1

INPUT INPUT INPUT INPUT INPUT INPUT INPUT

VREF_2 VREF_2 VREF_2

L04P_1

L04N_1

VREF_1

L12P_1

L12N_1

VREF_1

I/O

L17P_1

A2

I/O

L13P_1

I/O

L14P_1

I/O R

L14N_1

GND

INPUT

INPUT INPUT INPUT

VREF_2 VREF_2

I/O

L03P_1

A0

I/O

L03N_1

A1

I/O

L13N_1

I/O

L11P_1

GND

I/O T

L11N_1

I/O

L20N_2

GCLK3

I/O

L26N_2 VCCO_2 INPUT

D3

INPUT

â

GND

I/O

I/O

I/O

I/O U

L10N_1 L10P_1 L09N_1 L09P_1

I/O

L20P_2

GCLK2

I/O

L26P_2

INIT_B

I/O

L30P_2

I/O

L30N_2

I/O

L31N_2

I/O VCCAUX I/O

L33N_2

L06P_1

I/O VCCO_1 I/O V

L06N_1

L07N_1

I/O

L18P_2

GCLK14

I/O

L23P_2

GND

I/O

L25P_2

I/O

L31P_2

I/O

L34N_2

I/O

L33P_2

I/O

L02P_1

LDC1

I/O

L02N_1

LDC0

I/O

L05N_1

I/O W

L07P_1

I/O

L18N_2

GCLK15

I/O

L21N_2

I/O

L23N_2

I/O

L25N_2

I/O

L27N_2

I/O

L28N_2

D1

I/O

L34P_2

DONE

GND

I/O

L01N_1

I/O

Y

LDC2 L05P_1

I/O

L19P_2

GCLK0

VCCO_2

I/O

L22P_2

I/O

L19N_2

GCLK1

I/O

L21P_2

I/O

L22N_2

MOSI

CSI_B

I/O

L24N_2

DOUT

I/O

L24P_2

AWAKE

GND

I/O

L27P_2

I/O

L28P_2

D2

I/O

L29P_2

VCCO_2

I/O

L29N_2

I/O

L32N_2

I/O

L36N_2

CCLK

I/O

L35N_2

I/O

L32P_2

I/O

L36P_2

D0

DIN/MISO

I/O

L35P_2

I/O A

L01P_1

HDC

A

A

GND

B

Bank 2

DS529-4_02_012009

Figure 26:

118

www.xilinx.com

Right Half of FG484

Package (Top View)

DS529-4 (v2.0) August 19, 2010

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