XA3S500E-4PQG208I Datasheet, PDF (5/37 Pages) Xilinx, Inc – Proven advanced 90-nanometer process technology

R
Package Marking
Figure 2 provides a top marking example for XA Spartan-3E
FPGAs in the quad-flat packages. Figure 3 shows the top
marking for XA Spartan-3E FPGAs in BGA packages
except the 132-ball chip-scale package (CPG132). The
markings for the BGA packages are nearly identical to those
for the quad-flat packages, except that the marking is
rotated with respect to the ball A1 indicator. Figure 4 shows
the top marking for XA Spartan-3E FPGAs in the CPG132
package.
Note: No marking is shown for stepping.
Device Type
Package
Speed Grade
Temperature Range
R
R
SPARTAN
XA3S250E ^TM
PQG208AGQ0525
D1234567A
4I
Mask Revision Code
Fabrication Code
Process Technology
Date Code
Lot Code
Pin P1
DS635-1_02_082807
Figure 2: XA Spartan-3E FPGA QFP Package Marking Example
BGA Ball A1
Device Type
Package
Speed Grade
Temperature Range
R
SPARTAN ^R
XA3S250E^TM
FFTTGG225566AAGGQQ00552255
DD11223344556677AA
4I
Mask Revision Code
Fabrication Code
Process Code
Date Code
Lot Code
DS635_03_082807
Figure 3: XA Spartan-3E FPGA BGA Package Marking Example
Ball A1
3S250E
Device Type
Lot Code
F1234567-0525
Date Code
PHILIPPINES
Temperature Range
Package
C6AGQ 4I
C6 = CPG132
Speed Grade
Process Code
Mask Revision Code
Fabrication Code
DS635_04_082807
Figure 4: XA Spartan-3E FPGA CPG132 Package Marking Example
DS635 (v2.0) September 9, 2009
www.xilinx.com
Product Specification
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