XA3S500E-4PQG208I Datasheet, PDF (10/37 Pages) Xilinx, Inc – Proven advanced 90-nanometer process technology

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Table 8: Quiescent Supply Current Characteristics (Continued)
Symbol
Description
I_CCAUXQ Quiescent V_CCAUX
supply current
Device
XA3S100E
XA3S250E
XA3S500E
XA3S1200E
XA3S1600E
I-Grade Maximum
13
26
34
59
86
Q-Grade
Maximum
22
43
63
100
150
Units
mA
mA
mA
mA
mA
Notes:
1. The numbers in this table are based on the conditions set forth in Table 6.
2. Quiescent supply current is measured with all I/O drivers in a high-impedance state and with all pull-up/pull-down resistors at the I/O pads
disabled. Typical values are characterized using typical devices at room temperature (T_J of 25°C at V_CCINT = 1.2 V, V_CCO = 3.3V, and
V_CCAUX = 2.5V). The maximum limits are tested for each device at the respective maximum specified junction temperature and at maximum
voltage limits with V_CCINT = 1.26V, V_CCO = 3.465V, and V_CCAUX = 2.625V. The FPGA is programmed with a “blank” configuration data file
(i.e., a design with no functional elements instantiated). For conditions other than those described above, (e.g., a design including functional
elements), measured quiescent current levels may be different than the values in the table. For more accurate estimates for a specific
design, use the Xilinx XPower tools.
3. There are two recommended ways to estimate the total power consumption (quiescent plus dynamic) for a specific design: a) The
Spartan-3E XPower Estimator provides quick, approximate, typical estimates, and does not require a netlist of the design. b) XPower
Analyzer uses a netlist as input to provide maximum estimates as well as more accurate typical estimates.
4. The maximum numbers in this table indicate the minimum current each power rail requires in order for the FPGA to power-on successfully.
DS635 (v2.0) September 9, 2009
www.xilinx.com
Product Specification
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