XA3S500E-4PQG208I Datasheet, PDF (12/37 Pages) Xilinx, Inc – Proven advanced 90-nanometer process technology

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Table 10: DC Characteristics of User I/Os Using
Single-Ended Standards
Test
Conditions
Logic Level
Characteristics
IOSTANDARD
Attribute
LVTTL⁽³⁾
2
I_OL I_OH
(mA) (mA)
2 –2
V_OL
Max (V)
0.4
V_OH
Min (V)
2.4
4 4 –4
6 6 –6
8 8 –8
12 12 –12
16 16 –16
LVCMOS33⁽³⁾ 2
2
–2
0.4
V_CCO – 0.4
4 4 –4
6 6 –6
8 8 –8
12 12 –12
16 16 –16
LVCMOS25⁽³⁾ 2
2
–2
4 4 –4
0.4
V_CCO – 0.4
6 6 –6
8 8 –8
12 12 –12
LVCMOS18⁽³⁾ 2
2
–2
4 4 –4
0.4
V_CCO – 0.4
6 6 –6
8 8 –8
LVCMOS15⁽³⁾ 2
2
–2
4 4 –4
0.4
V_CCO – 0.4
6 6 –6
Table 10: DC Characteristics of User I/Os Using
Single-Ended Standards (Continued)
Test
Conditions
Logic Level
Characteristics
IOSTANDARD
Attribute
LVCMOS12⁽³⁾ 2
PCI33_3⁽⁴⁾
HSTL_I_18
HSTL_III_18
SSTL18_I
I_OL I_OH
(mA) (mA)
V_OL
Max (V)
2 –2
0.4
1.5 –0.5 10% V_CCO
8 –8
0.4
24 –8
0.4
6.7 –6.7 V_TT – 0.475
V_OH
Min (V)
V_CCO - 0.4
90% V_CCO
V_CCO - 0.4
V_CCO - 0.4
V_TT + 0.475
SSTL2_I
8.1 –8.1 V_TT – 0.61 V_TT + 0.61
Notes:
1. The numbers in this table are based on the conditions set forth in
Table 6 and Table 9.
2. Descriptions of the symbols used in this table are as follows:
– I_OL the output current condition under which V_OL is tested
– I_OH the output current condition under which V_OH is tested
– V_OL the output voltage that indicates a Low logic level
– V_OH the output voltage that indicates a High logic level
– V_CCO the supply voltage for output drivers
– V_TT the voltage applied to a resistor termination
3. For the LVCMOS and LVTTL standards: the same V_OL and V_OH
limits apply for both the Fast and Slow slew attributes.
4. Tested according to the relevant PCI specifications. For
information on PCI IP solutions, see www.xilinx.com/pci.
DS635 (v2.0) September 9, 2009
www.xilinx.com
Product Specification
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