DS561 Datasheet, PDF (3/29 Pages) Xilinx, Inc – PLBV46 SLAVE SINGLE

PLBV46 SLAVE SINGLE (v1.01a)
Table 1: PLBv46 Slave Single Core I/O Signal Description
Signal Name
Interface Signal Type Init Status
Description
PLB_BE(0:[C_SPLB_DWIDTH/8]-
1)
PLB Bus
I
See table note 1.
PLB_size(0:3)
PLB Bus
I
See table note 1.
PLB_type(0:2)
PLB Bus
I
See table note 1.
PLB_wrDBus(0:C_SPLB_DWIDT
H-1)
PLB Bus
I
See table note 1.
Sl_addrAck
PLB Bus
O
0
See table note 1.
Sl_SSize(0:1)
PLB Bus
O
0
See table note 1.
Sl_wait
PLB Bus
O
0
See table note 1.
Sl_rearbitrate
PLB Bus
O
0
See table note 1.
Sl_wrDack
PLB Bus
O
0
See table note 1.
Sl_wrComp
PLB Bus
O
0
See table note 1.
Sl_rdBus(0:C_SPLB_DWIDTH-1)
PLB Bus
O
0
See table note 1.
Sl_rdDAck
PLB Bus
O
0
See table note 1.
Sl_rdComp
PLB Bus
O
0
See table note 1.
Sl_MBusy(0:C_SPLB_NUM_MAS
TERS-1)
PLB Bus
O
0
See table note 1.
Sl_MWrErr(0:C_SPLB_NUM_MA
STERS-1)
PLB Bus
O
0
See table note 1.
Sl_MRdErr(0:C_SPLB_NUM_MA
STERS-1)
PLB Bus
O
0
See table note 1.
Unused PLB Signals
PLB_UABus(0:31))
PLB Bus
I
Unused
PLB_SAValid
PLB Bus
I
Unused
PLB_rdPrim
PLB Bus
I
Unused
PLB_wrPrim
PLB Bus
I
Unused
PLB_abort
PLB Bus
I
Unused
PLB_busLock
PLB Bus
I
Unused
PLB_MSize(0:1)
PLB Bus
I
Unused
PLB_TAttribute(0 to 15)
PLB Bus
I
Unused
PLB_lockerr
PLB Bus
I
Unused
PLB_wrBurst
PLB Bus
I
Unused
PLB_rdBurst
PLB Bus
I
Unused
PLB_wrPendReq
PLB Bus
I
Unused
PLB_rdPendReq
PLB Bus
I
Unused
PLB_rdPendPri(0:1)
PLB Bus
I
Unused
DS561 June 22, 2010
www.xilinx.com
3
Product Specification