DS561 Datasheet, PDF (23/29 Pages) Xilinx, Inc – PLBV46 SLAVE SINGLE

PLBV46 SLAVE SINGLE (v1.01a)
C_ARD_ADDR_RANGE_ARRAY : INTEGER_ARRAY_TYPE :=
-- Memory space identifiers
(
X0”000 _0000_7000 _0000", -- User0 Control Register Bank Base Address
X0”000 _0000_7000 _0007", – User0 Control Register Bank High Address
X”0000 _0000_7000 _0100", – User1 Control Register Bank Base Address
X”0000 _0000_7000 _010F” -- User1 Control Register Bank High Address
;)
Generates
Bus2IP_CS
bus
Bus2IP_CS(0) USER0 Control Register Bank Chip Select
Bus2IP_CS(1) USER1 Status Register Bank Chip Select
C_ARD_NUM_CE_ARRAY : INTEGER_ARRAY_TYPE :=
-- Memory space Chip Enable definition (in bits)
(
4, -- User Control Register Bank (4 registers = 4 CEs)
16, -- User Status Register Bank (16 registers 16 CEs)
;)
Generates
Bus2IP_WrCE
bus
Bus2IP_WrCE(0:3)
Bus2IP_WrCE(4:19)
USER0 WrCE (Registers 0 to 3)
USER1 WrCE (Registers 0 to 15)
Generates
Bus2IP_RdCE
bus
Bus2IP_RdCE(0:3)
Bus2IP_RdCE(4:19)
USER0 RdCE (Registers 0 to 3)
USER1 RdCE (Registers 0 to 15)
Figure 12: ARD Arrays and CS/CE Relationship Example
Available Support Functions for Automatic Ripping of CE and CS Buses.
The User may find it convenient to use some predefined functions developed by Xilinx to automatically
rip signals from the Bus2IP_CS, Bus2IP_WrCE, and Bus2IP_RdCE buses. These functions facilitate bus
ripping regardless of order or composition User functions in the ARD Arrays. This is extremely useful
if User parameterization adds or removes User IP functions (which changes the size and ordering of the
CS and CE buses). Table 4 on page 24 lists and details these functions. These functions are declared and
defined in the ipif_pkg.vhd source file that is located in the Xilinx EDK at the following path:
\EDK\hw\XilinxProcessorIPLib\pcores\proc_common_v2_00_a\hdl\vhdl\ipif_pkg.vhd.
The following library declaration must appear in the User’s VHDL source:
library proc_common_v2_00_a;
use proc_common_v2_00_a.ipif_pkg.all;
An example of how these functions are used is shown in Figure 13.
DS561 June 22, 2010
www.xilinx.com
23
Product Specification