XC3S50A-4TQG144C Datasheet, PDF(100/132 Page) Xilinx, Inc

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XC3S50A-4TQG144C Datasheet, PDF (100/132 Pages) Xilinx, Inc – Spartan-3A FPGA Family

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Pinout Descriptions

FG320 Footprint

A GND

I/O

L23N_0

I/O

L21N_0

I/O

L18N_0

VREF_0

I/O

L18P_0

I/O

L17P_0

GND

Bank 0

I/O

L13P_0

GCLK8

VCCAUX

I/O

L12P_0

GCLK6

I/O

L09N_0

GND

I/O

L06N_0

VREF_0

I/O

L03N_0

I/O

L03P_0

I/O

L02N_0

TCK

GND

I/O

L02N_3

I/O

L02P_3

I/O

L23P_0

I/O VCCO_0 I/O

L21P_0

L17N_0

I/O

L13N_0

GCLK9

I/O

L14P_0

GCLK10

I/O

L12N_0

GCLK7

I/O

L11P_0

GCLK4

I/O

L09P_0

I/O

L07N_0

I/O VCCO_0 I/O

L06P_0

L04P_0

I/O

L02P_0

VREF_0

I/O

L31N_1

A25

I/O

L30N_1

A23

I/O

L01N_3

I/O

L07P_3

I/O

L01P_3

I/O

L03N_3

TMS

I/O

L03P_3

PROG_B

I/O

L22P_0

GND

I/O

L22N_0

I/O

L20P_0

I/O

L20N_0

I/O

L15N_0

I/O

L14N_0

GCLK11

I/O

L11N_0

GCLK5

GND

I/O

L15P_0 L16P_0

GND

I/O

L10P_0 L07P_0

I/O VCCO_0 I/O

L10N_0

L05N_0

I/O

L05P_0 L04N_0

INPUT INPUT

I/O

L01N_0

GND

I/O

L01P_0

I/O

L29P_1

A20

I/O

L31P_1

A24

I/O

L25N_1

I/O

L30P_1

A22

I/O

L25P_1

I/O

L07N_3

VCCO_3

I/O

L06N_3

TDI

I/O

L24N_0 L24P_0

PUDC_B VREF_0

I/O VCCO_0 I/O

L19N_0

L16N_0

INPUT

VREF_0

I/O

L08P_0

INPUT

TDO

I/O

L29N_1

A21

I/O

L26N_1

A17

VCCO_1

I/O

L22N_1

A13

I/O

F L10N_3

VREF_3

I/O

L10P_3

I/O

L09P_3

I/O

L06P_3

I/O

L05P_3

GND

INPUT

I/O

L19P_0

INPUT

I/O

L08N_0

INPUT

L32N_1

INPUT

L32P_1

VREF_1

I/O

L27N_1

A19

I/O

L26P_1

A16

I/O

L21N_1

I/O

L22P_1

A12

G GND

INPUT INPUT I/O

I/O INPUT INPUT INPUT INPUT VCCAUX INPUT

L12N_3 L12P_3 L09N_3 L05N_3 L04P_3

GND

INPUT

L28N_1

INPUT

L24N_1

I/O

L27P_1

A18

I/O

L19N_1

A11

I/O

L21P_1

GND

I/O

L13N_3

I/O

L15N_3

IRDY2

LHCLK3

K VCCAUX

I/O

L13P_3

I/O

L15P_3

LHCLK2

I/O

L18P_3

TRDY2

LHCLK6

I/O

L14P_3

LHCLK0

I/O

L14N_3

LHCLK1

I/O

L18N_3

LHCLK7

VCCO_3

I/O

L17P_3

LHCLK4

GND

INPUT

L08N_3

VREF_3

INPUT

L16P_3

I/O

L17N_3

LHCLK5

INPUT

L08P_3

INPUT

L04N_3

VREF_3

GND VCCINT

I/O

I/O VCCINT

L11N_3 L11P_3

INPUT VCCAUX GND

L16N_3

GND

INPUT

VCCINT L28P_1

VREF_1

GND VCCAUX

INPUT

L24P_1

INPUT

L20N_1

VCCO_1

I/O

L23P_1

A14

I/O

L23N_1

A15

GND

I/O

L19P_1

A10

I/O

L17P_1

RHCLK4

I/O

L18N_1

RHCLK7

I/O

L15N_1

TRDY1

RHCLK3

I/O

L18P_1

IRDY1

RHCLK6

VCCAUX

INPUT

VCCINT L20P_1

VREF_1

INPUT

L16P_1

INPUT

L16N_1

I/O

L17N_1

RHCLK5

I/O

L13N_1

I/O

L14N_1 L15P_1

RHCLK1 RHCLK2

I/O

L L19P_3

VREF_3

I/O

L19N_3

I/O

L23P_3

I/O VCCO_3 INPUT

L23N_3

L20N_3

INPUT VCCINT

L20P_3

GND

VCCINT

GND

I/O

L11N_1

I/O

L11P_1

INPUT

L08N_1

VREF_1

VCCO_1

INPUT

L12N_1

I/O

L13P_1

I/O

L14P_1

RHCLK0

M GND

I/O INPUT INPUT INPUT INPUT

L21N_3 L24P_3 L24N_3 L28N_3 L28P_3

GND

INPUT

INPUT VCCAUX INPUT INPUT

VREF_2

INPUT

L08P_1

I/O

L06N_1

INPUT

L12P_1

VREF_1

I/O

L09P_1

I/O

L09N_1

GND

I/O

L21P_3

I/O

L22N_3

I/O

L26P_3

I/O

L26N_3

I/O

L29P_3

I/O

L29N_3

INPUT

I/O

L07P_2

INPUT INPUT INPUT

VREF_2

I/O

L19P_2

GND

INPUT

L04N_1

VREF_1

I/O

L06P_1

I/O

L05N_1

I/O

L10P_1

I/O

L10N_1

I/O

L22P_3

VCCO_3

I/O

L30P_3

INPUT

L32N_3

VREF_3

INPUT

L32P_3

INPUT INPUT

VREF_2 VREF_2

I/O

L07N_2

INPUT

VREF_2

I/O

L15P_2

VCCO_2

I/O

L19N_2

INPUT

VREF_2

INPUT

VREF_2

INPUT

L04P_1

I/O

L05P_1

VCCO_1

I/O

L07N_1

VREF_1

R I/O

I/O

L25P_3 L25N_3 L30N_3

GND

I/O

L04P_2

INPUT

I/O

L08P_2

VCCO_2

I/O

L09N_2

I/O

L15N_2

I/O

L16P_2

GND

I/O

L20N_2

I/O

L23P_2

GND

I/O

L01P_1

HDC

I/O

L03N_1

I/O

L07P_1

I/O

L27P_3

I/O

L27N_3

I/O

L01P_2

I/O

L03P_2

RDWR_B

I/O

L04N_2

I/O

L06P_2

I/O

L08N_2

I/O

L09P_2

GND

I/O

L13N_2

GCLK1

I/O

L16N_2

MOSI

CSI_B

I/O

L18P_2

AWAKE

I/O

L20P_2

INIT_B

I/O

L21N_2

I/O

L23N_2

SUSPEND

I/O

L01N_1

LDC2

I/O

L03P_1

I/O

L31P_3

V GND

I/O

L31N_3

I/O

L02P_2

I/O

L01N_2

I/O

L02N_2

CSO_B

I/O

L03N_2

VS2

VCCO_2

I/O

L06N_2

I/O

L05P_2

VS1

I/O

L05N_2

VS0

I/O

L10N_2

I/O

L10P_2

GND

I/O

L11P_2

GCLK12

I/O

L12P_2

GCLK14

I/O

L13P_2

GCLK0

I/O

L14N_2

GCLK3

I/O

L11N_2

GCLK13

I/O

L12N_2

GCLK15

VCCAUX

I/O

L14P_2

GCLK2

I/O

L17P_2

GND

I/O

L18N_2

DOUT

I/O

L17N_2

VCCO_2

I/O

L21P_2

I/O

L22N_2

I/O

L24N_2

CCLK

I/O

L02P_1

LDC1

I/O

L22P_2

I/O

L24P_2

DIN/MISO

DONE

I/O

L02N_1

LDC0

GND

Bank 2

Figure 23: FG320 Package Footprint (Top View)

DS529-4_05_012009

I/O: Unrestricted,

DUAL: Configuration

101 general-purpose user I/O 51 pins, then possible

user-I/O

23 -

VREF: User I/O or input

voltage reference for

bank

40 -

INPUT: Unrestricted,

general-purpose input

CLK: User I/O, input, or

VCCO: Output voltage

32 global buffer input

16 supply for bank

CONFIG: Dedicated

configuration pins

JTAG: Dedicated JTAG

port pins

VCCINT: Internal core

supply voltage (+1.2V)

N.C.: Not connected.

GND: Ground

3 Only the XC3S200A has 32

these pins (Â).

VCCAUX: Auxiliary

8 supply voltage

SUSPEND: Dedicated

2 SUSPEND and

dual-purpose AWAKE

Power Management pins

100

www.xilinx.com

DS529-4 (v2.0) August 19, 2010

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