W90210F Datasheet, PDF (39/67 Pages) Winbond – PA-RISC EMBEDDED CONTROLLER

W90210F
9. Timing Diagram
9.1 Memory controller
9.1.1 DRAM AC Timimg
PCLK
tav
MA11 - MA0
MD31 - MD0
trv1
RAS3# - RAS0#
tcv1
CAS3# - CAS0#
twv
WE#
tds tdh
Symbol
Parameter
t_rv1 RAS# valid delay ref. to PCLK rising
t_rv2 RAS# valid delay ref. to PCLK rising
t_cv1 CAS# valid delay ref. to PCLK rising
t_cv2 RAS# valid delay ref. to PCLK rising
t_wv
WE# valid delay ref. to PCLK rising
t_ds
Memory data setup time
t_dh
Memory data hold time
t_av
Memory address valid delay
9.1.2 ROM AC Timimg
9.1.2.1 Flash ROM Write Timimg
PCLK
trv2
tcv2
Min
Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
MA19 - MA0
RCS0# -
ROMRW#
ROMOE#
MD31 - MD0
tas
tcs
twp
tds
tdh
Symbol
Parameter
t_as
Address setup time
39
Min
Max
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Unit
ns
Version 1.4, 10/8/97