W90210F Datasheet, PDF (31/67 Pages) Winbond – PA-RISC EMBEDDED CONTROLLER

W90210F
DMA Channel Mode Register (MODE0=20c, MODE1=21c): The MODE register specifies the operation mode of
each channel.
The Wait State Number specifies the number of wait state needed for the particular DMA channel.
The Recovery State Number specifies the number of wait state needed for the recovery of the DMA
channel.
The channel terminal count flags indicate that a DMA operation has stopped.
The DMA channel enable bits enable or suspend a DMA operation after a channel is set up. If a enable bit
for a channel is cleared when a channel is active, the DMA will be suspended after pending requests for the
channel are serviced. The DMA operation will resume normally when the bit is reset.
DMA Channel Enable Bit
Terminal Indicator
0: Polling
1: Interrupt
DMA is used by Parallel Port (ECP)
Terminal Count Flag
Transfer Start (only for memory-to-memory)
Transfer Type: Block (0) or Demand(1)
DMA I/O Type
00: 8-bit
01: 16-bit
10: 32-bit
11: reserved
DMA Transfer Type
00: memory to memory
01: memory to I/O
10: I/O to memory
11: reserved
Recovery State
NumWbaeitrState
0 1 2 3 4 5 6 7 8 9 10 11
15 16
20
MODE
Figure 8.6 Programming DMA controller MODE register
31
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Version 1.4, 10/8/97