LM3S1512_16 Datasheet, PDF (97/660 Pages) Texas Instruments – Stellaris LM3S1512 Microcontroller

Stellaris^® LM3S1512 Microcontroller
3.1.4.3
In current Stellaris microcontroller implementations, the shareability and cache policy attributes do
not affect the system behavior. However, using these settings for the MPU regions can make the
application code more portable. The values given are for typical situations.
MPU Mismatch
When an access violates the MPU permissions, the processor generates a memory management
fault (see “Exceptions and Interrupts” on page 66 for more information). The MFAULTSTAT register
indicates the cause of the fault. See page 135 for more information.
3.2 Register Map
Table 3-7 on page 97 lists the Cortex-M3 Peripheral SysTick, NVIC, MPU and SCB registers. The
offset listed is a hexadecimal increment to the register's address, relative to the Core Peripherals
base address of 0xE000.E000.
Note: Register spaces that are not used are reserved for future or internal use. Software should
not modify any reserved memory address.
Table 3-7. Peripherals Register Map
Offset Name
Type
Reset
Description
System Timer (SysTick) Registers
0x010 STCTRL
R/W
0x0000.0000
0x014 STRELOAD
R/W
0x0000.0000
0x018 STCURRENT
R/WC
0x0000.0000
Nested Vectored Interrupt Controller (NVIC) Registers
0x100 EN0
R/W
0x0000.0000
0x104 EN1
R/W
0x0000.0000
0x180 DIS0
R/W
0x0000.0000
0x184 DIS1
R/W
0x0000.0000
0x200 PEND0
R/W
0x0000.0000
0x204 PEND1
R/W
0x0000.0000
0x280 UNPEND0
R/W
0x0000.0000
0x284 UNPEND1
R/W
0x0000.0000
0x300 ACTIVE0
RO
0x0000.0000
0x304 ACTIVE1
RO
0x0000.0000
0x400 PRI0
R/W
0x0000.0000
0x404 PRI1
R/W
0x0000.0000
0x408 PRI2
R/W
0x0000.0000
0x40C PRI3
R/W
0x0000.0000
0x410 PRI4
R/W
0x0000.0000
SysTick Control and Status Register
SysTick Reload Value Register
SysTick Current Value Register
Interrupt 0-31 Set Enable
Interrupt 32-43 Set Enable
Interrupt 0-31 Clear Enable
Interrupt 32-43 Clear Enable
Interrupt 0-31 Set Pending
Interrupt 32-43 Set Pending
Interrupt 0-31 Clear Pending
Interrupt 32-43 Clear Pending
Interrupt 0-31 Active Bit
Interrupt 32-43 Active Bit
Interrupt 0-3 Priority
Interrupt 4-7 Priority
Interrupt 8-11 Priority
Interrupt 12-15 Priority
Interrupt 16-19 Priority
See
page
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July 15, 2014
97
Texas Instruments-Production Data