LM3S1512_16 Datasheet, PDF (596/660 Pages) Texas Instruments – Stellaris LM3S1512 Microcontroller

Signal Tables
Table 18-6. Signals by Signal Name (continued)
Pin Name
Pin Number Pin Type Buffer Type^a Description
C1+
M1
I
Analog Analog comparator 1 positive input.
C1-
B7
I
Analog Analog comparator 1 negative input.
C1o
L8
O
TTL
Analog comparator 1 output.
C2+
M2
I
Analog Analog comparator 2 positive input.
C2-
L2
I
Analog Analog comparator 2 negative input.
C2o
M8
O
TTL
Analog comparator 2 output.
CCP0
E12
I/O
TTL
Capture/Compare/PWM 0.
CCP1
F1
I/O
TTL
Capture/Compare/PWM 1.
CCP2
D12
I/O
TTL
Capture/Compare/PWM 2.
CCP3
E1
I/O
TTL
Capture/Compare/PWM 3.
CCP4
E2
I/O
TTL
Capture/Compare/PWM 4.
CCP5
L1
I/O
TTL
Capture/Compare/PWM 5.
CCP6
C9
I/O
TTL
Capture/Compare/PWM 6.
CCP7
C8
I/O
TTL
Capture/Compare/PWM 7.
CMOD0
E11
I
TTL
CPU Mode bit 0. Input must be set to logic 0 (grounded); other
encodings reserved.
CMOD1
B10
I
TTL
CPU Mode bit 1. Input must be set to logic 0 (grounded); other
encodings reserved.
GND
B6
-
Power Ground reference for logic and I/O pins.
C4
C5
F10
F11
F12
H3
J3
J10
K5
K6
K10
L10
GNDA
A5
-
Power The ground reference for the analog circuits (ADC, Analog
B5
Comparators, etc.). These are separated from GND to
minimize the electrical noise contained on VDD from affecting
the analog functions.
HIB
I2C0SCL
I2C0SDA
I2C1SCL
I2C1SDA
M12
O
C11
I/O
C12
I/O
L6
I/O
M6
I/O
OD
An open-drain output with internal pull-up that indicates the
processor is in Hibernate mode.
OD
I²C module 0 clock.
OD
I²C module 0 data.
OD
I²C module 1 clock.
OD
I²C module 1 data.
IDX0
G1
I
TTL
QEI module 0 index.
LDO
E3
-
Power Low drop-out regulator output voltage. This pin requires an
external capacitor between the pin and GND of 1 µF or
greater. The LDO pin must also be connected to the VDD25
pins at the board level in addition to the decoupling
capacitor(s).
596
July 15, 2014
Texas Instruments-Production Data