LM3S1512_16 Datasheet, PDF (585/660 Pages) Texas Instruments – Stellaris LM3S1512 Microcontroller

Stellaris^® LM3S1512 Microcontroller
Table 18-2. Signals by Signal Name (continued)
Pin Name
Pin Number Pin Type Buffer Type^a Description
PF4
58
I/O
TTL
GPIO port F bit 4.
PF5
46
I/O
TTL
GPIO port F bit 5.
PF6
43
I/O
TTL
GPIO port F bit 6.
PF7
42
I/O
TTL
GPIO port F bit 7.
PG0
19
I/O
TTL
GPIO port G bit 0.
PG1
18
I/O
TTL
GPIO port G bit 1.
PG2
17
I/O
TTL
GPIO port G bit 2.
PG3
16
I/O
TTL
GPIO port G bit 3.
PG4
41
I/O
TTL
GPIO port G bit 4.
PG5
40
I/O
TTL
GPIO port G bit 5.
PG6
37
I/O
TTL
GPIO port G bit 6.
PG7
36
I/O
TTL
GPIO port G bit 7.
PH0
86
I/O
TTL
GPIO port H bit 0.
PH1
85
I/O
TTL
GPIO port H bit 1.
PH2
84
I/O
TTL
GPIO port H bit 2.
PH3
83
I/O
TTL
GPIO port H bit 3.
PhA0
11
I
TTL
QEI module 0 phase A.
PhB0
47
I
TTL
QEI module 0 phase B.
RST
64
I
TTL
System reset input.
SSI0Clk
28
I/O
TTL
SSI module 0 clock.
SSI0Fss
29
I/O
TTL
SSI module 0 frame signal.
SSI0Rx
30
I
TTL
SSI module 0 receive.
SSI0Tx
31
O
TTL
SSI module 0 transmit.
SSI1Clk
72
I/O
TTL
SSI module 1 clock.
SSI1Fss
73
I/O
TTL
SSI module 1 frame signal.
SSI1Rx
74
I
TTL
SSI module 1 receive.
SSI1Tx
75
O
TTL
SSI module 1 transmit.
SWCLK
80
I
TTL
JTAG/SWD CLK.
SWDIO
79
I/O
TTL
JTAG TMS and SWDIO.
SWO
77
O
TTL
JTAG TDO and SWO.
TCK
80
I
TTL
JTAG/SWD CLK.
TDI
78
I
TTL
JTAG TDI.
TDO
77
O
TTL
JTAG TDO and SWO.
TMS
79
I/O
TTL
JTAG TMS and SWDIO.
TRST
89
I
TTL
JTAG TRST.
U0Rx
26
I
TTL
UART module 0 receive. When in IrDA mode, this signal has
IrDA modulation.
U0Tx
27
O
TTL
UART module 0 transmit. When in IrDA mode, this signal has
IrDA modulation.
U1Rx
12
I
TTL
UART module 1 receive. When in IrDA mode, this signal has
IrDA modulation.
July 15, 2014
585
Texas Instruments-Production Data