LM3S1512_16 Datasheet, PDF (332/660 Pages) Texas Instruments – Stellaris LM3S1512 Microcontroller

General-Purpose Timers
9.2 Signal Description
Table 9-2 on page 332 and Table 9-3 on page 332 list the external signals of the GP Timer module
and describe the function of each. The GP Timer signals are alternate functions for some GPIO
signals and default to be GPIO signals at reset. The column in the table below titled "Pin Assignment"
lists the possible GPIO pin placements for these GP Timer signals. The AFSEL bit in the GPIO
Alternate Function Select (GPIOAFSEL) register (page 305) should be set to choose the GP Timer
function. For more information on configuring GPIOs, see “General-Purpose Input/Outputs
(GPIOs)” on page 281.
Table 9-2. General-Purpose Timers Signals (100LQFP)
Pin Name
Pin Number Pin Type Buffer Type^a Description
CCP0
66
I/O
TTL
Capture/Compare/PWM 0.
CCP1
100
I/O
TTL
Capture/Compare/PWM 1.
CCP2
67
I/O
TTL
Capture/Compare/PWM 2.
CCP3
95
I/O
TTL
Capture/Compare/PWM 3.
CCP4
96
I/O
TTL
Capture/Compare/PWM 4.
CCP5
25
I/O
TTL
Capture/Compare/PWM 5.
CCP6
86
I/O
TTL
Capture/Compare/PWM 6.
CCP7
85
I/O
TTL
Capture/Compare/PWM 7.
a. The TTL designation indicates the pin has TTL-compatible voltage levels.
Table 9-3. General-Purpose Timers Signals (108BGA)
Pin Name
Pin Number Pin Type Buffer Type^a Description
CCP0
E12
I/O
TTL
Capture/Compare/PWM 0.
CCP1
F1
I/O
TTL
Capture/Compare/PWM 1.
CCP2
D12
I/O
TTL
Capture/Compare/PWM 2.
CCP3
E1
I/O
TTL
Capture/Compare/PWM 3.
CCP4
E2
I/O
TTL
Capture/Compare/PWM 4.
CCP5
L1
I/O
TTL
Capture/Compare/PWM 5.
CCP6
C9
I/O
TTL
Capture/Compare/PWM 6.
CCP7
C8
I/O
TTL
Capture/Compare/PWM 7.
a. The TTL designation indicates the pin has TTL-compatible voltage levels.
9.3 Functional Description
The main components of each GPTM block are two free-running 16-bit up/down counters (referred
to as TimerA and TimerB), two 16-bit match registers, two prescaler match registers, and two 16-bit
load/initialization registers and their associated control functions. The exact functionality of each
GPTM is controlled by software and configured through the register interface.
Software configures the GPTM using the GPTM Configuration (GPTMCFG) register (see page 343),
the GPTM TimerA Mode (GPTMTAMR) register (see page 344), and the GPTM TimerB Mode
(GPTMTBMR) register (see page 346). When in one of the 32-bit modes, the timer can only act as
a 32-bit timer. However, when configured in 16-bit mode, the GPTM can have its two 16-bit timers
configured in any combination of the 16-bit modes.
332
July 15, 2014
Texas Instruments-Production Data