LM3S1512_16 Datasheet, PDF (26/660 Pages) Texas Instruments – Stellaris LM3S1512 Microcontroller

Revision History
Table 1. Revision History (continued)
Date
October 2008
Revision
4149
Description
■ Corrected values for DSOSCSRC bit field in Deep Sleep Clock Configuration (DSLPCLKCFG)
register.
■ The FMA value for the FMPRE3 register was incorrect in the Flash Resident Registers table in the
Internal Memory chapter. The correct value is 0x0000.0006.
■ Incorrect Comparator Operating Modes tables were removed from the Analog Comparators chapter.
August 2008
3447
■ Added note on clearing interrupts to Interrupts chapter.
■ Added Power Architecture diagram to System Control chapter.
■ Additional minor data sheet clarifications and corrections.
July 2008
3108 ■ Additional minor data sheet clarifications and corrections.
May 2008
2972
■ The 108-Ball BGA pin diagram and pin tables had an error. The following signals were erroneously
indicated as available and have now been changed to a No Connect (NC):
– Ball C1: Changed PE7 to NC
– Ball C2: Changed PE6 to NC
■ As noted in the PCN, the option to provide VDD25 power from external sources was removed. Use
the LDO output as the source of VDD25 input.
■ Additional minor data sheet clarifications and corrections.
April 2008
2881
■ The Θ_JA value was changed from 55.3 to 34 in the "Thermal Characteristics" table in the Operating
Characteristics chapter.
■ Bit 31 of the DC3 register was incorrectly described in prior versions of the data sheet. A reset of
1 indicates that an even CCP pin is present and can be used as a 32-KHz input clock.
■ Values for I_{DD_HIBERNATE} were added to the "Detailed Power Specifications" table in the "Electrical
Characteristics" chapter.
■ The "Hibernation Module DC Electricals" table was added to the "Electrical Characteristics" chapter.
■ The T_VDDRISE parameter in the "Reset Characteristics" table in the "Electrical Characteristics" chapter
was changed from a max of 100 to 250.
■ The maximum value on Core supply voltage (V_DD25) in the "Maximum Ratings" table in the "Electrical
Characteristics" chapter was changed from 4 to 3.
■ The operational frequency of the internal 30-kHz oscillator clock source is 30 kHz ± 50% (prior data
sheets incorrectly noted it as 30 kHz ± 30%).
■ A value of 0x3 in bits 5:4 of the MISC register (OSCSRC) indicates the 30-KHz internal oscillator is
the input source for the oscillator. Prior data sheets incorrectly noted 0x3 as a reserved value.
■ The reset for bits 6:4 of the RCC2 register (OSCSRC2) is 0x1 (IOSC). Prior data sheets incorrectly
noted the reset was 0x0 (MOSC).
■ Two figures on clock source were added to the "Hibernation Module":
– Clock Source Using Crystal
– Clock Source Using Dedicated Oscillator
■ The following notes on battery management were added to the "Hibernation Module" chapter:
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July 15, 2014
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