LM3S1512_16 Datasheet, PDF (613/660 Pages) Texas Instruments – Stellaris LM3S1512 Microcontroller

Stellaris^® LM3S1512 Microcontroller
Table 20-13. JTAG Characteristics (continued)
Parameter
No.
Parameter Parameter Name
Min
Nom
Max
Unit
2-mA drive
9
11
ns
J13
TCK fall to High-Z
t _{TDO_DVZ} ^{from Data Valid}
4-mA drive
8-mA drive
7
9
ns
-
6
8
ns
8-mA drive with slew rate control
7
9
ns
J14
t_TRST
TRST assertion time
J15
t_{TRST_SU}
TRST setup time to TCK rise
100
-
-
ns
10
-
-
ns
Figure 20-2. JTAG Test Clock Input Timing
J2
J3
J4
TCK
J6
J5
Figure 20-3. JTAG Test Access Port (TAP) Timing
TCK
TMS
TDI
TDO
J7
J8
J7
J8
TMS Input Valid
TMS Input Valid
J9
J10
J9
J10
TDI Input Valid
TDI Input Valid
J11
J12
J13
TDO Output Valid
TDO Output Valid
Figure 20-4. JTAG TRST Timing
TCK
TRST
J14
J15
July 15, 2014
613
Texas Instruments-Production Data