LM3S1512_16 Datasheet, PDF (588/660 Pages) Texas Instruments – Stellaris LM3S1512 Microcontroller

Signal Tables
Table 18-3. Signals by Function, Except for GPIO (continued)
Function
Pin Name Pin Number Pin Type Buffer Type^a
Description
GND
9
-
Power Ground reference for logic and I/O pins.
15
21
33
39
45
54
57
63
69
82
87
94
GNDA
4
-
Power The ground reference for the analog circuits (ADC,
97
Analog Comparators, etc.). These are separated
from GND to minimize the electrical noise contained
on VDD from affecting the analog functions.
LDO
Power
7
-
Power Low drop-out regulator output voltage. This pin
requires an external capacitor between the pin and
GND of 1 µF or greater. The LDO pin must also be
connected to the VDD25 pins at the board level in
addition to the decoupling capacitor(s).
VDD
8
-
Power Positive supply for I/O and some logic.
20
32
44
56
68
81
93
VDD25
14
-
Power Positive supply for most of the logic function,
38
including the processor core and most peripherals.
62
88
VDDA
3
-
Power The positive supply for the analog circuits (ADC,
98
Analog Comparators, etc.). These are separated
from VDD to minimize the electrical noise contained
on VDD from affecting the analog functions. VDDA
pins must be supplied with a voltage that meets the
specification in “Recommended DC Operating
Conditions” on page 607, regardless of system
implementation.
IDX0
10
I
TTL
QEI module 0 index.
QEI
PhA0
11
I
TTL
QEI module 0 phase A.
PhB0
47
I
TTL
QEI module 0 phase B.
588
July 15, 2014
Texas Instruments-Production Data