LM3S1512_16 Datasheet, PDF (3/660 Pages) Texas Instruments – Stellaris LM3S1512 Microcontroller

Stellaris^® LM3S1512 Microcontroller
Table of Contents
Revision History ............................................................................................................................. 22
About This Document .................................................................................................................... 28
Audience .............................................................................................................................................. 28
About This Manual ................................................................................................................................ 28
Related Documents ............................................................................................................................... 28
Documentation Conventions .................................................................................................................. 29
1
1.1
1.2
1.3
1.4
1.4.1
1.4.2
1.4.3
1.4.4
1.4.5
1.4.6
1.4.7
1.4.8
Architectural Overview .......................................................................................... 31
Product Features .......................................................................................................... 31
Target Applications ........................................................................................................ 38
High-Level Block Diagram ............................................................................................. 39
Functional Overview ...................................................................................................... 41
ARM Cortex™-M3 ......................................................................................................... 41
Motor Control Peripherals .............................................................................................. 42
Analog Peripherals ........................................................................................................ 42
Serial Communications Peripherals ................................................................................ 43
System Peripherals ....................................................................................................... 44
Memory Peripherals ...................................................................................................... 45
Additional Features ....................................................................................................... 45
Hardware Details .......................................................................................................... 46
2
2.1
2.2
2.2.1
2.2.2
2.2.3
2.2.4
2.3
2.3.1
2.3.2
2.3.3
2.3.4
2.3.5
2.3.6
2.4
2.4.1
2.4.2
2.4.3
2.4.4
2.4.5
2.4.6
2.4.7
2.5
2.5.1
2.5.2
2.5.3
The Cortex-M3 Processor ...................................................................................... 47
Block Diagram .............................................................................................................. 48
Overview ...................................................................................................................... 49
System-Level Interface .................................................................................................. 49
Integrated Configurable Debug ...................................................................................... 49
Trace Port Interface Unit (TPIU) ..................................................................................... 50
Cortex-M3 System Component Details ........................................................................... 50
Programming Model ...................................................................................................... 51
Processor Mode and Privilege Levels for Software Execution ........................................... 51
Stacks .......................................................................................................................... 51
Register Map ................................................................................................................ 52
Register Descriptions .................................................................................................... 53
Exceptions and Interrupts .............................................................................................. 66
Data Types ................................................................................................................... 66
Memory Model .............................................................................................................. 66
Memory Regions, Types and Attributes ........................................................................... 68
Memory System Ordering of Memory Accesses .............................................................. 68
Behavior of Memory Accesses ....................................................................................... 68
Software Ordering of Memory Accesses ......................................................................... 69
Bit-Banding ................................................................................................................... 70
Data Storage ................................................................................................................ 72
Synchronization Primitives ............................................................................................. 73
Exception Model ........................................................................................................... 74
Exception States ........................................................................................................... 75
Exception Types ............................................................................................................ 75
Exception Handlers ....................................................................................................... 78
July 15, 2014
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