LM3S1512_16 Datasheet, PDF (583/660 Pages) Texas Instruments – Stellaris LM3S1512 Microcontroller

Stellaris^® LM3S1512 Microcontroller
Table 18-2. Signals by Signal Name (continued)
Pin Name
Pin Number Pin Type Buffer Type^a Description
C2+
23
I
Analog Analog comparator 2 positive input.
C2-
22
I
Analog Analog comparator 2 negative input.
C2o
43
O
TTL
Analog comparator 2 output.
CCP0
66
I/O
TTL
Capture/Compare/PWM 0.
CCP1
100
I/O
TTL
Capture/Compare/PWM 1.
CCP2
67
I/O
TTL
Capture/Compare/PWM 2.
CCP3
95
I/O
TTL
Capture/Compare/PWM 3.
CCP4
96
I/O
TTL
Capture/Compare/PWM 4.
CCP5
25
I/O
TTL
Capture/Compare/PWM 5.
CCP6
86
I/O
TTL
Capture/Compare/PWM 6.
CCP7
85
I/O
TTL
Capture/Compare/PWM 7.
CMOD0
65
I
TTL
CPU Mode bit 0. Input must be set to logic 0 (grounded); other
encodings reserved.
CMOD1
76
I
TTL
CPU Mode bit 1. Input must be set to logic 0 (grounded); other
encodings reserved.
GND
9
-
Power Ground reference for logic and I/O pins.
15
21
33
39
45
54
57
63
69
82
87
94
GNDA
4
-
Power The ground reference for the analog circuits (ADC, Analog
97
Comparators, etc.). These are separated from GND to
minimize the electrical noise contained on VDD from affecting
the analog functions.
HIB
I2C0SCL
I2C0SDA
I2C1SCL
I2C1SDA
51
O
OD
An open-drain output with internal pull-up that indicates the
processor is in Hibernate mode.
70
I/O
OD
I²C module 0 clock.
71
I/O
OD
I²C module 0 data.
34
I/O
OD
I²C module 1 clock.
35
I/O
OD
I²C module 1 data.
IDX0
10
I
TTL
QEI module 0 index.
LDO
7
-
Power Low drop-out regulator output voltage. This pin requires an
external capacitor between the pin and GND of 1 µF or
greater. The LDO pin must also be connected to the VDD25
pins at the board level in addition to the decoupling
capacitor(s).
OSC0
48
I
Analog Main oscillator crystal input or an external clock reference
input.
OSC1
49
O
Analog Main oscillator crystal output. Leave unconnected when using
a single-ended clock source.
PA0
26
I/O
TTL
GPIO port A bit 0.
July 15, 2014
583
Texas Instruments-Production Data