LM3S1512_16 Datasheet, PDF (601/660 Pages) Texas Instruments – Stellaris LM3S1512 Microcontroller

Stellaris^® LM3S1512 Microcontroller
Table 18-7. Signals by Function, Except for GPIO (continued)
Function
Pin Name Pin Number Pin Type Buffer Type^a
Description
SWCLK
A9
I
TTL
JTAG/SWD CLK.
SWDIO
B9
I/O
TTL
JTAG TMS and SWDIO.
SWO
A10
O
TTL
JTAG TDO and SWO.
TCK
JTAG/SWD/SWO
TDI
A9
I
TTL
JTAG/SWD CLK.
B8
I
TTL
JTAG TDI.
TDO
A10
O
TTL
JTAG TDO and SWO.
TMS
B9
I/O
TTL
JTAG TMS and SWDIO.
TRST
A8
I
TTL
JTAG TRST.
GND
B6
-
Power Ground reference for logic and I/O pins.
C4
C5
F10
F11
F12
H3
J3
J10
K5
K6
K10
L10
GNDA
A5
-
Power The ground reference for the analog circuits (ADC,
B5
Analog Comparators, etc.). These are separated
from GND to minimize the electrical noise contained
on VDD from affecting the analog functions.
LDO
E3
-
Power Low drop-out regulator output voltage. This pin
requires an external capacitor between the pin and
GND of 1 µF or greater. The LDO pin must also be
Power
connected to the VDD25 pins at the board level in
addition to the decoupling capacitor(s).
VDD25
C3
-
Power Positive supply for most of the logic function,
D3
including the processor core and most peripherals.
F3
G3
VDD33
E10
-
Power Positive supply for I/O and some logic.
G10
G11
G12
H10
K7
K8
K9
VDDA
C6
-
Power The positive supply for the analog circuits (ADC,
C7
Analog Comparators, etc.). These are separated
from VDD to minimize the electrical noise contained
on VDD from affecting the analog functions. VDDA
pins must be supplied with a voltage that meets the
specification in “Recommended DC Operating
Conditions” on page 607, regardless of system
implementation.
July 15, 2014
601
Texas Instruments-Production Data