NS32FV100 Datasheet, PDF (73/96 Pages) Texas Instruments – NS32FX100 NS32FV100 NS32FX200 System Controller

4 0 Device Specifications (Continued)
4 6 2 Timing Tables (Continued)
4 6 2 1 Output Signals Internal Propagation Delays (Continued)
Symbol Figure
Description
Reference
Condition
NS32FX200 – 15
Min
Max
NS32FX200 – 20
Min
Max
NS32FX200-25
Min
Max
Units
t_AHv
4-16 A16–23 Valid
After R E
CTTL T1
50
36
32
ns
t_AHh
4-16 A16–23 Hold
After R E
0
0
0
ns
CTTL T4 or Ti
t_WEa
4-10 WE0–1 Signal
Active
After R E
CTTL
20
17
17
ns
t_WEia
t_WEw
t_CWh
t_OEa
t_OEia
t_SEL0a
t_SEL0ia
t_SEL1a
t_SEL1ia
t_SEL3a
t_SEL3ia
t_RASa
t_RASia
t_RCa
t_RCLa
t_CASa
4-10
4-10
4-10
4-9
4-9
4-11
4-11
4-11
4-11
4-13
4-13
4-9
4-9
4-9
4-9
4-9
WE0–1 Signal
Inactive
After R E
CTTL
t_{CTp 2} t_{CTp 2} t_{CTp 2} t_{CTp 2} t_{CTp 2} t_{CTp 2}
ns
a 20
a 17
a 17
WE0–1 Pulse
At 0 8V
80
61
45
ns
Width (Note 2)
(both edges)
WE0–1 Signal
After F E
20
15
10
ns
Hold (Notes 1 2) CAS
OE Signal
Active
After R E
CTTL
t_{CTp 2} t_{CTp 2} t_{CTp 2} t_{CTp 2} t_{CTp 2} t_{CTp 2}
ns
a 20
a 16
a 16
te ^OESignal
Inactive
After R E
CTTL
20
16
16
ns
SEL0 Signal
Active (Note 3)
After R E
CTTL T1
50
36
33
ns
SEL0 Signal
le ^Inactive
After R E
CTTL T4
24
22
20
ns
SEL1 Signal
Active (Note 3)
After R E
CTTL T1
50
36
33
ns
SEL1 Signal
Inactive
After R E
CTTL T4
24
22
20
ns
SEL3 Signal
o _Active
After R E
CTTL
20
18
18
ns
SEL3 Signal
Inactive
After R E
CTTL
24
22
20
ns
s RAS0–1 Signal
Active
After R E
CTTL
20
17
17
ns
RAS0–1 Signal
Inactive
After R E
CTTL
20
17
17
ns
b CAS Signal
After F E
46
33
25
ns
Active (Note 2)
RAS0– 1
CAS Signal
After F E
Active (Notes 2 4) RAS0– 1
50
40
30
ns
O^{CAS Signal}
After R E
20
16
16
ns
Active
CTTL
t_CASia
4-9 CAS Signal
Inactive
After R E
CTTL
20
16
16
ns
Note 1 Assuming WE0–1 load l CAS load
Note 2 Guaranteed by characterization Due to tester conditions these parameters are not 100% tested
Note 3 Generated asynchronous to CTTL as a function of the inputs AD0–15 A16–23 and ADS
Note 4 Assuming CAS load l RAS load
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