NS32FV100 Datasheet, PDF (29/96 Pages) Texas Instruments – NS32FX100 NS32FV100 NS32FX200 System Controller

2 0 Architecture (Continued)
2 5 3 Registers
PBCFG Printer Bitmap Shifter Configuration register
7
21
0
res
SLNR ECLK
Upon reset the non-reserved bits of TPHC are cleared to
‘‘0’’
STBON Strobe-On 16-bit register
The strobe-on interval is (STBON a 1) MCLK
cycles
ECLK
External Clock (NS32FX200 only )
0 Shift using an internal clock Clock frequency
is selected by the printer bitmap internal clock
generator
1 Shift using an external clock
STBOFF Strobe-Off 16-bit register
The strobe-off interval is (STBOFF a 1) MCLK
cycles
PSTSL
Printer Strobes Start Time Slot 8-bit register
Holds the time slot in which the strobe pulse train
starts
The external clock must be frozen at least
PMTSL Printer Motor Time-Slot 8-bit register
four instructions after both DMA channel 1
Holds the time slot in which the Printer Motor In-
and the Bitmap Shifter are enabled (i e
terrupt Pulse is generated The interrupt pulse oc-
MCFG EPBMSe1)
Note Only the NS32FX200 supports operation using an
external clock ECLK must always be cleared to
‘‘0’’ in the NS32FX100 and NS32FV100
SLNR Shift direction
0 Shift right (LSB first)
1 Shift left (MSB first)
PBCFG may not be written while MCFG ETPHB e 1 It
should be configured before printer activation
te ^PCLON
Printer Bitmap Shifter internal clock (PCLK) high
time 8-bit register
PCLK is high for (PCLON a 1) CTTL cycles
PCLON may be modified only when
MCFG EPBMS e 0
PCLOFF Printer Bitmap Shifter internal clock (PCLK) low
time 8-bit register
le ^{PCLK is low for (PCLOFF a 1) CTTL cycles}
PCLOFF may be modified only when
MCFG EPBMS e 0
TPHC Thermal Print-Head Control register
7
54
3
21
0
res
STBEN PIS SPOL
STBM
o _STBM
s _SPOL
b _PIS
O ^STBEN
Strobing mode (see Figure 2-12 and Figure
2-13 )
00 Four strobes
01 Two strobes
10 Reserved
11 Reserved
Strobes polarity
0 Active low strobe-on
1 Active high strobe-on
Printer Interrupt Source
0 Strobes done interrupt pulse
1 DMA channel 1 interrupt pulse
Strobes Enable
PDAC
curs at the beginning of the specified time slot
Note
For an event to occur at the beginning of time slot n the
relevant register (PSTSL or PMTSL) must be set to the
value n a 1 If the written value equals the TSL value
the current time slot) then the event will occur either in
the next time slot or after 257 time slots
Example If a printer interrupt is to occur at the begin-
ning of time slot 255 write the value ‘‘0’’ to PSTSL
Printer PWM Pulse Width Modulation DAC
7
65
0
res
PDAC
The PWM signal duty cycle is (PDAC a 1) 64
The signal width is zero when PDAC e 3F
PACMP Printer Analog Comparator Status 8-bit register
Read only
Bit 0
1 DAC voltage^lPTMP pin voltage
0 DAC voltage^kPTMP pin voltage
Bits 1–7 Reserved
2 5 4 Usage Recommendations
1 Before activating the Printer program the appropriate
Ports module registers PBDO PBMS PCDO PCMS and
PCEN to connect the Printer module to the NS32FX100
I O pins
2 Completion of the Printer Bitmap Shifter operation is indi-
cated either through the STROBE-DONE interrupt or
through the DMA COUNTER-DONE status bit (STAT TC
is set to ‘‘1’’) If indicated by the DMA STAT TC bit 32
additional bits must be explicitly shifted out of the Bitmap
Shifter to complete the DMA transfer
3 When TPHC STBEN e 0 strobes are still generated in-
ternally hence the Strobes-done interrupt can still be
used even when strobes are disabled
4 When using the Bitmap Shifter with an external clock the
operation must be carried out in the following order
a Initialize the ports module to work with the printer us-
ing an external clock (ports B and C)
Set by software to enable strobe generation on
5 Disable the strobes (TPHC STBEN e 0) before disabling
strobe pins STB0–3 Automatically cleared by
the TPH module (MCFG ETPHB e 0)
hardware after the last strobe-on interval is com-
pleted To avoid losing strobe pulses verify that
this bit is cleared before setting it to ‘‘1’
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