DS90UB926Q-Q1 Datasheet, PDF (45/57 Pages) Texas Instruments – 5- to 85-MHz 24-Bit Color FPD-Link III Deserializer With Bidirectional Control Channel

www.ti.com
8 Application and Implementation
DS90UB926Q-Q1
SNLS422B – JULY 2012 – REVISED JANUARY 2015
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The DS90UB926Q-Q1, in conjunction with the DS90UB925Q-Q1, is intended for interface between a host
(graphics processor) and a Display. It supports an 24-bit color depth (RGB888) and high definition (720p) digital
video format. It allows to receive a three 8-bit RGB stream with a pixel rate up to 85 MHz together with three
control bits (VS, HS and DE) and three I2S-bus audio stream with an audio sampling rate up to 192 kHz.
8.1.1 Display Application
The deserializer is expected to be located close to its target device. The interconnect between the deserializer
and the target device is typically in the 1 to 3 inch separation range. The input capacitance of the target device is
expected to be in the 5 to 10 pF range. Care should be taken on the PCLK output trace as this signal is edge
sensitive and strobes the data. It is also assumed that the fanout of the deserializer is up to three in the repeater
mode. If additional loads need to be driven, a logic buffer or mux device is recommended.
Copyright © 2012–2015, Texas Instruments Incorporated
Product Folder Links: DS90UB926Q-Q1
Submit Documentation Feedback
45