DS90UB926Q-Q1 Datasheet, PDF (19/57 Pages) Texas Instruments – 5- to 85-MHz 24-Bit Color FPD-Link III Deserializer With Bidirectional Control Channel

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DS90UB926Q-Q1
SNLS422B – JULY 2012 – REVISED JANUARY 2015
Table 2. SSCG Configuration
LFMODE = H (5 - <15 MHz)
SSCG CONFIGURATION (0x2C) LFMODE = H (5 - <15 MHz)
SSC[2]
SSC[1]
L
L
L
L
L
H
L
H
H
L
H
L
H
H
H
H
SSC[0]
L
H
L
H
L
H
L
H
SPREAD SPECTRUM OUTPUT
Fdev (%)
±0.5
±1.3
±1.8
±2.5
±0.7
±1.2
±2.0
±2.5
Fmod (kHz)
PCLK / 628
PCLK / 388
7.3.8 Enhanced Progressive Turn-On (EPTO)
The deserializer LVCMOS parallel outputs timing are delayed. Groups of 8-bit R, G and B outputs switch in a
different time. This minimizes the number of outputs switching simultaneously and helps to reduce supply noise.
In addition, it spreads the noise spectrum out reducing overall EMI.
7.3.9 LVCMOS VDDIO Option
The deserializer parallel bus can operate with 1.8 V or 3.3 V levels (VDDIO) for target (Display) compatibility.
The 1.8 V levels will offer a lower noise (EMI) and also a system power savings.
7.3.10 Power Down (PDB)
The Serializer has a PDB input pin to ENABLE or POWER DOWN the device. This pin can be controlled by the
host or through the V_DDIO, where V_DDIO = 3 V to 3.6 V or V_DD33. To save power disable the link when the display
is not needed (PDB = LOW). When the pin is driven by the host, make sure to release it after V_DD33 and V_DDIO
have reached final levels; no external components are required. In the case of driven by the V_DDIO = 3 V to 3.6 V
or V_DD33 directly, a 10-kΩ resistor to the V_DDIO = 3.0V to 3.6V or V_DD33 , and a >10-µF capacitor to the ground are
required (See Figure 24).
7.3.11 Stop Stream Sleep
The deserializer enters a low power SLEEP state when the input serial stream is stopped. A STOP condition is
detected when the embedded clock bits are not present. When the serial stream starts again, the deserializer will
then lock to the incoming signal and recover the data.
NOTE
In STOP STREAM SLEEP, the Serial Control Bus Registers values are retained.
7.3.12 Serial Link Fault Detect
The serial link fault detection is able to detect any of following 7 conditions
1. cable open
2. + to - short
3. + short to GND
4. - short to GND
5. + short to battery
6. - short to battery
7. cable is linked incorrectly
If any one of the fault conditions occurs, The Link Detect Status is 0 (cable is not detected) on the Serial Control
Bus Register bit 0 of address 0x1C Table 11. The link errors can be monitored though Link Error Count of the
Serial Control Bus Register bit [4:0] of address 0x41 Table 11.
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