DS90UB926Q-Q1 Datasheet, PDF (13/57 Pages) Texas Instruments – 5- to 85-MHz 24-Bit Color FPD-Link III Deserializer With Bidirectional Control Channel

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DS90UB926Q-Q1
SNLS422B – JULY 2012 – REVISED JANUARY 2015
t_CLH
80%
20%
t_CHL
Figure 3. LVCMOS Transition Times
V_DDIO
GND
RIN
(Diff.)
PCLK
(RFB = L)
ROUT[23:0],
I2S[2:0],
HS, VS, DE
START
BIT
STOP
BIT
012
3
3
SYMBOL N
START
BIT
STOP
BIT
012
3
3
SYMBOL N+1
t_DD
SYMBOL N-2
SYMBOL N-1
Figure 4. Delay - Latency
SYMBOL N
PDB
2.0V
0.8V
RIN
(Diff.)
}v[šŒ
LOCK
TRI-STATE
or LOW
ROUT[23:0],
HS, VS, DE,
I2S
PCLK
(RFB = L)
OFF
t_DDLT
TRI-STATE or LOW or Pulled Up
TRI-STATE or LOW
IN LOCK TIME
t_XZR
Z or L
Z or L or PU
ACTIVE
Z or L
OFF
Figure 5. PLL Lock Times and PDB TRI-STATE Delay
PCLK
w/ RFB = H
ROUT[23:0],
VS, HS, DE,
I2S
V_OHmin
V_OLmax
t_ROS
1/2 V_DDIO
t_ROH
V_DDIO
GND
V_DDIO
GND
Figure 6. Output Data Valid (Setup and Hold) Times With SSCG = Off
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