DS90UB926Q-Q1 Datasheet, PDF (27/57 Pages) Texas Instruments – 5- to 85-MHz 24-Bit Color FPD-Link III Deserializer With Bidirectional Control Channel

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DS90UB926Q-Q1
SNLS422B – JULY 2012 – REVISED JANUARY 2015
Sample Rate (kHz)
96
192
32
44.1
48
96
192
Table 5. Audio Interface Frequencies (continued)
I2S Data Word Size
(bits)
24
24
32
32
32
32
32
I2S CLK
(MHz)
4.608
9.216
2.048
2.822
3.072
6.144
12.288
MCLK Output
(MHz)
x1 of I2S CLK
x2 of I2S CLK
x4 of I2S CLK
x1 of I2S CLK
x2 of I2S CLK
x4 of I2S CLK
x1 of I2S CLK
x2 of I2S CLK
x4 of I2S CLK
x1 of I2S CLK
x2 of I2S CLK
x4 of I2S CLK
x1 of I2S CLK
x2 of I2S CLK
x4 of I2S CLK
x1 of I2S CLK
x2 of I2S CLK
x4 of I2S CLK
x1 of I2S CLK
x2 of I2S CLK
x4 of I2S CLK
Bit [6:4]
(Address 0x3A)
010
011
100
011
100
101
001
010
011
001
010
011
001
010
011
010
011
100
011
100
110
7.3.19 Interrupt Pin — Functional Description and Usage (INTB)
1. On DS90UB925Q-Q1, set register 0xC6[5] = 1 and 0xC6[0] = 1
2. DS90UB926Q-Q1 deserializer INTB_IN (pin 16) is set LOW by some downstream device.
3. DS90UB925Q-Q1 serializer pulls INTB (pin 31) LOW. The signal is active low, so a LOW indicates an
interrupt condition.
4. External controller detects INTB = LOW; to determine interrupt source, read ISR register .
5. A read to ISR will clear the interrupt at the DS90UB925Q-Q1, releasing INTB.
6. The external controller typically must then access the remote device to determine downstream interrupt
source and clear the interrupt driving INTB_IN. This would be when the downstream device releases the
INTB_IN (pin 16) on the DS90UB926Q-Q1. The system is now ready to return to step (1) at next falling edge
of INTB_IN.
7.3.20 GPIO[3:0] and GPO_REG[8:4]
In 18-bit RGB operation mode, the optional R[1:0] and G[1:0] of the DS90UB926Q-Q1 can be used as the
general purpose IOs GPIO[3:0] in either forward channel (Outputs) or back channel (Inputs) application.
GPIO[3:0] Enable Sequence
See Table 6 for the GPIO enable sequencing.
1. Enable the 18-bit mode either through the configuration register bit Table 11 on DS90UB925Q-Q1 only.
DS90UB926Q-Q1 is automatically configured as in the 18-bit mode.
2. To enable GPIO3 forward channel, write 0x03 to address 0x0F on DS90UB925Q-Q1, then write 0x05 to
address 0x1F on DS90UB926Q-Q1.
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