DS90UB926Q-Q1 Datasheet, PDF (40/57 Pages) Texas Instruments – 5- to 85-MHz 24-Bit Color FPD-Link III Deserializer With Bidirectional Control Channel

DS90UB926Q-Q1
SNLS422B – JULY 2012 – REVISED JANUARY 2015
www.ti.com
Register Maps (continued)
ADD
(dec)
34
ADD Register
(hex) Name
0x22 Data Path
Control
35 0x23 General
Purpose
Control
Table 11. Serial Control Bus Registers (continued)
Bit(s)
7
6
5
4
3
2
1
0
7
6:5
4
3
2
1
0
Register
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
R
R
R
R
R
Default Function
(hex)
Descriptions
0x00
Override FC 1: Disable loading of this register from the forward channel,
Config
keeping locally written values intact
0: Allow forward channel loading of this register
Pass RGB
Setting this bit causes RGB data to be sent independent of
DE. This allows operation in systems which may not use
DE to frame video data or send other data when DE is
deasserted. Note that setting this bit blocks packetized
audio. This bit does not need to be set in DS90UB925 or in
Backward Compatibility mode.
1: Pass RGB independent of DE
0: Normal operation
Note: this bit is automatically loaded from the remote
serializer unless bit 7 of this register is set.
DE Polarity
This bit indicates the polarity of the DE (Data Enable)
signal.
1: DE is inverted (active low, idle high)
0: DE is positive (active high, idle low)
Note: this bit is automatically loaded from the remote
serializer unless bit 7 of this register is set.
I2S_Gen
This bit controls whether the Receiver outputs packetized
Auxiliary/Audio data on the RGB video output pins.
1: Don't output packetized audio data on RGB video output
pins
0: Output packetized audio on RGB video output pins.
Note: this bit is automatically loaded from the remote
serializer unless bit 7 of this register is set.
I2S Channel 1: Set I2S Channel B Enable from reg_22[0]
B Enable 0: Set I2S Channel B Enable from MODE_SEL pin
Override Note: this bit is automatically loaded from the remote
serializer unless bit 7 of this register is set.
18-bit Video
Select
1: Select 18-bit video mode
0: Select 24-bit video mode
Note: this bit is automatically loaded from the remote
serializer unless bit 7 of this register is set.
I2S
Transport
Select
1: Enable I2S Data Forward Channel Frame Transport
0: Enable I2S Data Island Transport
Note: this bit is automatically loaded from the remote
serializer unless bit 7 of this register is set.
I2S Channel I2S Channel B Enable
B Enable 1: Enable I2S Channel B on B1 output
0: I2S Channel B disabled
Note: this bit is automatically loaded from the remote
serializer unless bit 7 of this register is set.
0x10
Rx RGB
Checksum
RX RGB Checksum Enable Setting this bit enables the
Receiver to validate a one-byte checksum following each
video line. Checksum failures are reported in the STS
register
Reserved
Mode_Sel Mode Select is Done
LFMODE Low Frequency Mode Status
Repeater Repeater Mode Status
Backward Backward Compatible Mode Status
I2S Channel I2S Channel B Status
B
40
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