DS90UB926Q-Q1 Datasheet, PDF (31/57 Pages) Texas Instruments – 5- to 85-MHz 24-Bit Color FPD-Link III Deserializer With Bidirectional Control Channel

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DS90UB926Q-Q1
SNLS422B – JULY 2012 – REVISED JANUARY 2015
In a repeater application, the I2C interface at each TX and RX may be configured to transparently pass I2C
communications upstream or downstream to any I2C device within the system. This includes a mechanism for
assigning alternate IDs (Slave Aliases) to downstream devices in the case of duplicate addresses.
At each repeater node, the parallel LVCMOS interface fans out to up to three serializer devices, providing parallel
RGB video data, HS/VS/DE control signals and, optionally, packetized audio data (transported during video
blanking intervals). Alternatively, the I2S audio interface may be used to transport digital audio data between
receiver and transmitters in place of packetized audio. All audio and video data is transmitted at the output of the
Receiver and is received by the Transmitter..
Figure 21 provides more detailed block diagram of a 1:2 repeater configuration.
7.4.4.1 Repeater Connections
The Repeater requires the following connections between the Receiver and each Transmitter for Figure 22:
1. Video Data – Connect PCLK, RGB and control signals (DE, VS, HS).
2. I2C – Connect SCL and SDA signals. Both signals should be pulled up to V_DD33 with 4.7 kΩ resistors.
3. Audio – Connect I2S_CLK, I2S_WC, and I2S_DA signals.
4. IDx pin – Each Transmitter and Receiver must have an unique I2C address.
5. MODE_SEL pin – All Transmitter and Receiver must be set into the Repeater Mode.
6. Interrupt pin– Connect DS90UB926Q-Q1 INTB_IN pin to DS90UB925Q-Q1 INTB pin. The signal must be
pulled up to V_DDIO.
DS90UB926Q-Q1
DS90UB925Q-Q1
RGB[7:0) / ROUT[23:0]
DIN[23:0] / RGB[7:0]
DE
VS
HS
VDD33
I2S_CLK
I2S_WC
I2S_DA
MODE_SEL
VDD33
ID[x]
INTB_IN
SDA
SCL
Optional
VDDIO
Optional
VDD33
DE
VS
HS
I2S_CLK
I2S_WC
I2S_DA
MODE_SEL
VDD33
INTB
SDA
SCL
VDD33
ID[x]
Figure 22. Repeater Connection Diagram
7.5 Programming
7.5.1 Serial Control Bus
The DS90UB926Q-Q1 is configured by the use of a serial control bus that is I2C protocol compatible. . Multiple
deserializer devices may share the serial control bus since 16 device addresses are supported. Device address
is set through the R₁ and R₂ values on IDx pin. See Figure 23.
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