DS90UH926Q-Q1 Datasheet, PDF (3/58 Pages) Texas Instruments – 720p 24-Bit Color FPD-Link III Deserializer With HDCP

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5 Pin Configuration and Functions
DS90UH926Q-Q1
SNLS337K – OCTOBER 2010 – REVISED JANUARY 2015
NKB Package
60-Pin WQFN With Exposed Thermal Pad
Top View
OSS_SEL 46
RES0 47
VDD33_A 48
RIN+ 49
RIN- 50
CMF 51
CMLOUTP 52
CMLOUTN 53
NC 54
CAPR12 55
IDx 56
CAPP12 57
CAPI2S 58
PDB 59
MCLK 60
DS90UH926Q-Q1
TOP VIEW
DAP = GND
30 I2S_WC/GPO_REG7
29 VDD33_B
28 G0/GPIO2
27 G1/GPIO3
26 G2
25 G3
24 VDDIO
23 G4
22 G5
21 G6
20 G7
19 B0/GPO_REG4
18 B1/I2S_DB/GPO_REG5
17 B2
16 BISTC/INTB_IN
Pin Functions
PIN
NAME
NO.
I/O, TYPE
DESCRIPTION
LVCMOS PARALLEL INTERFACE
R[7:0]
33, 34, 35, 36, O, LVCMOS RED Parallel Interface Data Output Pins
37, 39, 40, 41 with pulldown Leave open if unused
R0 can optionally be used as GPIO0 and R1 can optionally be used as GPIO1
G[7:0]
20, 21, 22, 23, O, LVCMOS GREEN Parallel Interface Data Output Pins
25, 26, 27, 28 with pulldown Leave open if unused
G0 can optionally be used as GPIO2 and G1 can optionally be used as GPIO3.
B[7:0]
9, 10, 11, 12,
14, 17, 18, 19
O, LVCMOS BLUE Parallel Interface Data Output Pins
with pulldown Leave open if unused
B0 can optionally be used as GPO_REG4 and B1 can optionally be used as I2S_DB or
GPO_REG5.
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