DS90UH926Q-Q1 Datasheet, PDF (25/58 Pages) Texas Instruments – 720p 24-Bit Color FPD-Link III Deserializer With HDCP

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DS90UH926Q-Q1
SNLS337K – OCTOBER 2010 – REVISED JANUARY 2015
SAMPLE RATE
(kHz)
96
192
32
44.1
48
96
192
32
44.1
48
96
192
Table 5. Audio Interface Frequencies (continued)
I2S DATA WORD SIZE
(bits)
16
16
24
24
24
24
24
32
32
32
32
32
I2S CLK
(MHz)
3.072
6.144
1.536
2.117
2.304
4.608
9.216
2.048
2.822
3.072
6.144
12.288
MCLK OUTPUT
(MHz)
x1 of I2S CLK
x2 of I2S CLK
x4 of I2S CLK
x1 of I2S CLK
x2 of I2S CLK
x4 of I2S CLK
x1 of I2S CLK
x2 of I2S CLK
x4 of I2S CLK
x1 of I2S CLK
x2 of I2S CLK
x4 of I2S CLK
x1 of I2S CLK
x2 of I2S CLK
x4 of I2S CLK
x1 of I2S CLK
x2 of I2S CLK
x4 of I2S CLK
x1 of I2S CLK
x2 of I2S CLK
x4 of I2S CLK
x1 of I2S CLK
x2 of I2S CLK
x4 of I2S CLK
x1 of I2S CLK
x2 of I2S CLK
x4 of I2S CLK
x1 of I2S CLK
x2 of I2S CLK
x4 of I2S CLK
x1 of I2S CLK
x2 of I2S CLK
x4 of I2S CLK
x1 of I2S CLK
x2 of I2S CLK
x4 of I2S CLK
BIT [6:4]
(ADDRESS 0x3A)
001
010
011
010
011
100
000
001
010
001
010
011
001
010
011
010
011
100
011
100
101
001
010
011
001
010
011
001
010
011
010
011
100
011
100
110
7.3.19 Interrupt Pin: Functional Description and Usage (INTB)
1. On DS90UH925Q-Q1, set register 0xC6[5] = 1 and 0xC6[0] = 1
2. DS90UH926Q-Q1 deserializer INTB_IN (pin 16) is set LOW by some downstream device.
3. DS90UH925Q-Q1 serializer pulls INTB (pin 31) LOW. The signal is active low, so a LOW indicates an
interrupt condition.
4. External controller detects INTB = LOW; to determine interrupt source, read HDCP_ISR register .
5. A read to HDCP_ISR will clear the interrupt at the DS90UH925, releasing INTB.
6. The external controller typically must then access the remote device to determine downstream interrupt
source and clear the interrupt driving INTB_IN. This would be when the downstream device releases the
INTB_IN (pin 16) on the DS90UH926Q-Q1. The system is now ready to return to step (1) at next falling edge
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