DS90UH926Q-Q1 Datasheet, PDF (2/58 Pages) Texas Instruments – 720p 24-Bit Color FPD-Link III Deserializer With HDCP

DS90UH926Q-Q1
SNLS337K – OCTOBER 2010 – REVISED JANUARY 2015
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 6
6.1 Absolute Maximum Ratings ..................................... 6
6.2 ESD Ratings.............................................................. 6
6.3 Recommended Operating Conditions....................... 6
6.4 Thermal Information .................................................. 7
6.5 DC Electrical Characteristics .................................... 7
6.6 AC Electrical Characteristics..................................... 9
6.7 DC and AC Serial Control Bus Characteristics......... 9
6.8 Recommended Timing Requirements for the Serial
Control Bus .............................................................. 10
6.9 Switching Characteristics ........................................ 10
6.10 Typical Characteristics .......................................... 14
7 Detailed Description ............................................ 15
7.1 Overview ................................................................. 15
7.2 Functional Block Diagram ....................................... 15
7.3 Feature Description................................................. 15
7.4 Device Functional Modes........................................ 27
7.5 Programming........................................................... 31
7.6 Register Maps ......................................................... 32
8 Application and Implementation ........................ 46
8.1 Application Information............................................ 46
8.2 Typical Application .................................................. 46
9 Power Supply Recommendations...................... 49
10 Layout................................................................... 49
10.1 Layout Guidelines ................................................. 49
10.2 Layout Example .................................................... 51
11 Device and Documentation Support ................. 52
11.1 Documentation Support ........................................ 52
11.2 Trademarks ........................................................... 52
11.3 Electrostatic Discharge Caution ............................ 52
11.4 Glossary ................................................................ 52
12 Mechanical, Packaging, and Orderable
Information ........................................................... 52
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision J (April 2013) to Revision K
Page
• Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1
Changes from Revision I (August 2012) to Revision J
Page
• Changed layout of National Data Sheet to TI format ............................................................................................................. 1
Changes from Revision H (March 2012) to Revision I
Page
• Corrected Table 9: Configuration Select (MODE_SEL) #6 I2S Channel B (18–bit Mode) from L to H, corrected typo
in table “DC and AC Serial Control Bus Characteristics” from VDDIO to VDD33, added Recommended FRC settings
table, added “When backward compatible mode = ON, set LFMODE = 0” under Functional Description. Reformatted
Table 9 and added clarification to notes. Added clarification to notes on Table 11 Serial Control Bus Registers,
address 0x02[3:0] (backwards compatible and LFMODE registers), added “Note: Do not enable SSCG feature if
PCLK source into the SER has an SSC clock already.” under Functional Description, EMI REDUCTION
FEATURES, Spread Spectrum Clock Generation (SSCG).................................................................................................... 1
Changes from Revision G (February 2012) to Revision H
Page
• Deleted “DC Electrical Characteristics” PDB VDDIO = 1.71 to 1.89V, added under “SUPPLY CURRENT I_{DDZ, DDIOZ},
I_DDIOZMax = 10mA, added under “CML MONITOR DRIVER OUTPUT AC SPECIFICATIONS” E_W Min = 0.3 UI AND
E_H Min = 200 mV, added “INTERRUPT PIN — FUNCTIONAL DESCRIPTION AND USAGE (INTB)” under
Functional Description section, updated "POWER DOWN (PDB) description under Functional Description from
VDDIO to VDDIO = 3.0 to 3.6V or V_DD33, updated Figure 24. Typical Connection Diagram ................................................. 1
2
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