DS90UH926Q-Q1 Datasheet, PDF (12/58 Pages) Texas Instruments – 720p 24-Bit Color FPD-Link III Deserializer With HDCP

DS90UH926Q-Q1
SNLS337K – OCTOBER 2010 – REVISED JANUARY 2015
CMLOUT
(Diff.)
EW
VOD (+)
EH
0V
EH
t_BIT (1 UI)
Figure 2. CML Output Driver
VOD (-)
t_CLH
80%
20%
t_CHL
Figure 3. LVCMOS Transition Times
V_DDIO
GND
RIN
(Diff.)
PCLK
(RFB = L)
RGB[7:0],
I2S[2:0],
HS, VS, DE
START
BIT
STOP
BIT
012
33
SYMBOL N
START
BIT
STOP
BIT
012
33
SYMBOL N+1
t_DD
SYMBOL N-2
SYMBOL N-1
Figure 4. Delay - Latency
SYMBOL N
PDB
2.0V
RIN
(Diff.)
0.8V
}v[šŒ
LOCK
TRI-STATE
or LOW
RGB[7:0],
HS, VS, DE,
I2S
t_DDLT
TRI-STATE or LOW or Pulled Up
Z or L
t_XZR
Z or L or PU
PCLK
(RFB = L)
OFF
TRI-STATE or LOW
IN LOCK TIME
ACTIVE
Z or L
OFF
Figure 5. PLL Lock Times and PDB TRI-STATE Delay
www.ti.com
12
Submit Documentation Feedback
Copyright © 2010–2015, Texas Instruments Incorporated
Product Folder Links: DS90UH926Q-Q1