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DS90UH926Q-Q1 Datasheet, PDF (22/58 Pages) Texas Instruments – 720p 24-Bit Color FPD-Link III Deserializer With HDCP
DS90UH926Q-Q1
SNLS337K – OCTOBER 2010 – REVISED JANUARY 2015
www.ti.com
8-bit in / 8 bit out
Gray level Data Out
Entry
(8-bits)
0 00000000b
1 00000001b
2 00000011b
3 00000011b
4 00000110b
5 00000110b
6 00000111b
7 00000111b
8 00001000b
9 00001010b
10 00001001b
11 00001011b
6-bit in / 6 bit out
Gray level Data Out
Entry
(8-bits)
0 00000000b
1 N/A
2 N/A
3 N/A
4 00000100b
5 N/A
6 N/A
7 N/A
8 00001000b
9 N/A
10 N/A
11 N/A
6-bit in / 8 bit out
Gray level Data Out
Entry
(8-bits)
0 00000001b
1 N/A
2 N/A
3 N/A
4 00000110b
5 N/A
6 N/A
7 N/A
8 00001011b
9 N/A
10 N/A
11 N/A
248 11111010b
249 11111010b
250 11111011b
251 11111011b
252 11111110b
253 11111101b
254 11111101b
255 11111111b
248 11111000b
249 N/A
250 N/A
251 N/A
252 11111100b
253 N/A
254 N/A
255 N/A
248 11111010b
249 N/A
250 N/A
251 N/A
252 11111111b
253 N/A
254 N/A
255 N/A
Figure 17. White Balance LUT Configurations
PAGE
0
1
2
3
Table 3. White Balance Register Table
ADD ADD
(dec) (hex)
REGISTER
NAME
42 0x2A White Balance
Control
0 – 00 – FF White Balance
255
Red LUT
0 – 00 – FF White Balance
255
Green LUT
0 – 00 – FF White Balance
255
Blue LUT
BITS
7:6
ACCES DEFAU
S
LT
(hex)
FUNCTION
RW 0x00 Page Setting
5
RW
4
RW
3:0
FF:0 RW
FF:0 RW
FF:0 RW
White Balance
Enable
N/A
Red LUT
N/A
Green LUT
N/A
Blue LUT
DESCRIPTION
00: Configuration Registers
01: Red LUT
10: Green LUT
11: Blue LUT
0: White Balance Disable
1: White Balance Enable
0: Reload Disable
1: Reload Enable
Reserved
256 8–bit entries to be applied to the Red
subpixel data
256 8–bit entries to be applied to the Green
subpixel data
256 8–bit entries to be applied to the Blue
subpixel data
7.3.16.2 Adaptive HI-FRC Dithering
The Adaptive FRC Dithering Feature delivers product-differentiating image quality. It reduces 24-bit RGB (8 bits
per subpixel) to 18-bit RGB (6 bits per sub-pixel), smoothing color gradients, and allowing the flexibility to use
lower cost 18-bit displays. FRC (Frame Rate Control) dithering is a method to emulate “missing” colors on a
lower color depth LCD display by changing the pixel color slightly with every frame. FRC is achieved by
controlling on and off pixels over multiple frames (Temporal). Static dithering regulates the number of on and off
pixels in a small defined pixel group (Spatial). The FRC module includes both Temporal and Spatial methods and
also Hi-FRC. Conventional FRC can display only 16,194,277 colors with 6-bit RGB source. “Hi-FRC” enables full
(16,777,216) color on an 18-bit LCD panel. The “adaptive” FRC module also includes input pixel detection to
apply specific Spatial dithering methods for smoother gray level transitions. When enabled, the lower LSBs of
each RGB output are not active; only 18 bit data (6 bits per R,G and B) are driven to the display. This feature is
enabled through the serial control bus register.
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