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SMJ320C31_07 Datasheet, PDF (8/59 Pages) Texas Instruments – DIGITAL SIGNAL PROCESSORS
SMJ320C31, SMJ320LC31, SMQ320LC31
DIGITAL SIGNAL PROCESSORS
SGUS026G − APRIL 1998 − REVISED SEPTEMBER 2006
Terminal Functions (Continued)
TERMINAL
TYPE†
NAME
QTY
DESCRIPTION
CONDITIONS
WHEN
SIGNAL IS Z TYPE‡
SUPPLY AND OSCILLATOR SIGNALS
H1
1
O / Z External H1 clock. H1 has a period equal to twice CLKIN.
S
H3
1
O / Z External H3 clock. H3 has a period equal to twice CLKIN.
S
VDD
5-V supply for ’C31 devices and 3.3-V supply for ’LC31 devices. All must be
20
I
connected to a common supply plane.§
VSS
X1
25
I Ground. All grounds must be connected to a common ground plane.
Output from the internal-crystal oscillator. If a crystal is not used, X1 should be left
1
O
unconnected.
X2 / CLKIN
1
I Internal-oscillator input from a crystal or a clock
RESERVED¶
EMU2 −EMU0 3
I
Reserved for emulation. Use pullup resistors to VDD
EMU3
1
O / Z Reserved for emulation
S
† I = input, O = output, Z = high-impedance state
‡ S = SHZ active, H = HOLD active, R = RESET active
§ Recommended decoupling capacitor value is 0.1 µF.
¶ Follow the connections specified for the reserved pins. Use 18 -kΩ −22-kΩ pullup resistors for best results. All VDD supply pins must be connected
to a common supply plane, and all ground pins must be connected to a common ground plane.
8
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