SMJ320C31_07 Datasheet, PDF (14/59 Pages) Texas Instruments – DIGITAL SIGNAL PROCESSORS

SMJ320C31, SMJ320LC31, SMQ320LC31
DIGITAL SIGNAL PROCESSORS
SGUS026G − APRIL 1998 − REVISED SEPTEMBER 2006
electrical characteristics over recommended ranges of supply voltage (unless otherwise noted)
(see Note 3)^†
PARAMETER
TEST CONDITIONS
’C31
MIN TYP^‡ MAX
’LC31
MIN TYP^‡ MAX ^UNIT
VOH
VOL
IZ
II
IIP
High-level output voltage
Low-level output voltage
High-impedance current
Input current
Input current (with internal
pullup)
VDD = MIN, IOH = MAX
VDD = MIN, IOH = MAX
VDD = MAX
VI = VSS to VDD
Inputs with internal pullups§
2.4
− 20
− 10
− 600
3
2
0.3 0.6
+ 20 − 20
+ 10 − 10
20 − 600
V
0.4 V
+ 20 µA
+ 10 µA
10 µA
ICC Supply current¶#
TA = 25°C,
VDD = MAX
fx = 40 MHz
fx = 50 MHz
’C31-40
’LC31-40
’C31-50
fx = 60 MHz ’C31-60
IDD Supply current
Standby, IDLE2 Clocks shut off
Input
All inputs except CLKIN
Ci
capacitance
CLKIN
160 400
200 425
225 475
50
15*
25
150 300
mA
20
µA
15*
pF
25
Co Output capacitance
20*
20* pF
† _{All input and output voltage levels are TTL compatible.}
‡ _{For ’C31, all typical values are at VDD = 5 V, TA = 25°C. For ’LC31, all typical values are at VDD = 3.3 V, TA = 25°C.}
§ _{Pins with internal pullup devices: INT3 −INT0, MCBL / MP.}
¶ _{Actual operating current is less than this maximum value. This value was obtained under specially produced worst-case test conditions, which}
are not sustained during normal device operation. These conditions consist of continuous parallel writes of a checkerboard pattern to both primary
and expansion buses at the maximum rate possible. See Calculation of TMS320C30 Power Dissipation Application Report (literature number
SPRA020).
# _{fx is the input clock frequency.}
* This parameter is not production tested.
NOTE 3: All voltage values are with respect to VSS. All input and output voltage levels are TTL-compatible. CLKIN can be driven by a CMOS
clock.
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