SMJ320C31_07 Datasheet, PDF (26/59 Pages) Texas Instruments – DIGITAL SIGNAL PROCESSORS

SMJ320C31, SMJ320LC31, SMQ320LC31
DIGITAL SIGNAL PROCESSORS
SGUS026G − APRIL 1998 − REVISED SEPTEMBER 2006
loading when XF is configured as an output
The following table defines the timing parameter for loading the XF register when the XFx pin is configured as
an output.
timing for loading the XF register when configured as an output pin (see Figure 20)
NO.
33 tv(H3H-XF) Valid time, H3 high to XFx
’C31-40
’LC31-40
MIN MAX
13
’C31-50
MIN MAX
12
’C31-60
MIN MAX
11
UNIT
ns
Fetch Load
Instruction
H3
Decode
Read
Execute
H1
OUTXFx Bit
(see Note A)
1 or 0
33
XFx Pin
NOTE A: OUTXFx represents either bit 2 or 6 of the IOF register.
Figure 20. Timing for Loading XF Register When Configured as an Output Pin
26
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