SMJ320C31_07 Datasheet, PDF (10/59 Pages) Texas Instruments – DIGITAL SIGNAL PROCESSORS

SMJ320C31, SMJ320LC31, SMQ320LC31
DIGITAL SIGNAL PROCESSORS
SGUS026G − APRIL 1998 − REVISED SEPTEMBER 2006
memory map^†
0h
03Fh
040h
Reset, Interrupt, Trap Vector, and
Reserved Locations (64)
(External STRB Active)
0h
Reserved for Boot-Loader
Operations
External
STRB Active
(8M Words − 64 Words)
FFFh
1000h
400000h
Boot 1
Boot 2
External
STRB
Active
(8M Words −
4K Words)
7FFFFFh
800000h
807FFFh
808000h
8097FFh
809800h
809BFFh
809C00h
Reserved
(32K Words)
Peripheral Bus
Memory-Mapped Registers
(6K Words Internal)
RAM Block 0
(1K Words Internal)
RAM Block 1
(1K Words Internal)
809FFFh
80A000h
FFFFFFh
External
STRB Active
(8M Words − 40K Words)
7FFFFFh
800000h
807FFFh
808000h
8097FFh
809800h
809BFFh
809C00h
809FC0h
809FC1h
809FFFh
80A000h
FFF000h
FFFFFFh
Reserved
(32K Words)
Peripheral Bus
Memory-Mapped Registers
(6K Words Internal)
RAM Block 0
(1K Words Internal)
RAM Block 1
(1K Words − 63 Words Internal)
User-Program Interrupt
and Trap Branches
(63 Words Internal)
Boot 3
External
STRB Active
(8M Words −
40K Words)
(a) Microprocessor Mode
(b) Microcomputer/Boot-Loader Mode
† _{Figure 1 depicts the memory map for the SMJ320C31. See the TMS320C3x Users Guide (literature number SPRU031) for a detailed description}
of this memory mapping.
Figure 1. SMJ320C31 Memory Map
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