SMJ320C31_07 Datasheet, PDF (25/59 Pages) Texas Instruments – DIGITAL SIGNAL PROCESSORS

SMJ320C31, SMJ320LC31, SMQ320LC31
DIGITAL SIGNAL PROCESSORS
SGUS026G − APRIL 1998 − REVISED SEPTEMBER 2006
XF0 and XF1 timing when executing SIGI
The following table defines the timing parameters for the XF0 and XF1 pins during execution of SIGI.
timing for XF0 and XF1 when executing SIGI for SMJ320C31 (see Figure 19)
NO.
29 td(H3H-XF0L) Delay time, H3 high to XF0 low
30 td(H3H-XF0H) Delay time, H3 high to XF0 high
31 tsu(XF1-H1L) Setup time, XF1 before H1 low
32 th(H1L-XF1) Hold time, XF1 after H1 low
’C31-40
MIN MAX
13
13
9
0
’LC31-40
MIN MAX
13
13
10
0
’C31-50
MIN MAX
12
12
8
0
’C31-60
MIN MAX
11
11
8
0
UNIT
ns
ns
ns
ns
Fetch
SIGI
Decode
Read
Execute
H3
H1
31
XF0
32
XF1
29
30
Figure 19. Timing for XF0 and XF1 When Executing SIGI
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