SMJ320C31_07 Datasheet, PDF (38/59 Pages) Texas Instruments – DIGITAL SIGNAL PROCESSORS

SMJ320C31, SMJ320LC31, SMQ320LC31
DIGITAL SIGNAL PROCESSORS
SGUS026G − APRIL 1998 − REVISED SEPTEMBER 2006
data-rate timing modes (continued)
CLKX/R
FSX(INT)
65
FSX(EXT)
DX
FSR
62
66
67
59
Bit n-1
64
Bit n-2
Bit n-3
68
Bit 0
63
DR
Bit n-1
Bit n-2
Bit n-3
60
61
NOTES: A. Timing diagrams show operation with CLKXP = CLKRP = FSXP = FSRP = 0.
B. Timing diagrams depend on the length of the serial-port word, where n = 8, 16, 24, or 32 bits, respectively.
C. The timings that are not specified expressly for the variable data-rate mode are the same as those that are specified for the fixed
data-rate mode.
Figure 27. Timing for Variable Data-Rate Mode
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