SMJ320C31_07 Datasheet, PDF (37/59 Pages) Texas Instruments – DIGITAL SIGNAL PROCESSORS

SMJ320C31, SMJ320LC31, SMQ320LC31
DIGITAL SIGNAL PROCESSORS
SGUS026G − APRIL 1998 − REVISED SEPTEMBER 2006
data-rate timing modes
Unless otherwise indicated, the data-rate timings shown in Figure 26 and Figure 27 are valid for all serial-port
modes, including handshake. For a functional description of serial-port operation, see subsection 8.2.12 of the
TMS320C3x User’s Guide (literature number SPRU031).
54
H1
CLKX/R
DX
DR
FSR
62
FSX(INT)
54
66
63
64
55
56
61
Bit n-1
60
56
57
58
59
Bit n-2
Bit n-1
Bit n-2
68
Bit 0
62
FSX(EXT)
64
65
NOTES: A. Timing diagrams show operations with CLKXP = CLKRP = FSXP = FSRP = 0.
B. Timing diagrams depend on the length of the serial-port word, where n = 8, 16, 24, or 32 bits, respectively.
Figure 26. Timing for Fixed Data-Rate Mode
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