DS90UB914ATRHSTQ1 Datasheet, PDF (59/68 Pages) Texas Instruments – DS90UB913A-Q1/DS90UB914A-Q1 25 to100 MHz 10/12-Bit

DS90UB913A-Q1, DS90UB914A-Q1
www.ti.com
SNLS443A – MAY 2013 – REVISED JUNE 2013
VDDIO
C3
C8
LVCMOS
Parallel
Bus
1.8V
10 kQ
RID
DS90UB913AQ (SER)
1.8V
VDDIO
DIN0
DIN1
DIN2
DIN3
DIN4
DIN5
DIN6
DIN7
DIN8
DIN9
DIN10
DIN11
HS
VS
PCLK
VDDT
C4
C9
VDDPLL
C5 C10
C14
VDDCML
C6 C11 C15
VDDD
C7 C12
C13
1.8V
FB1
1.8V
FB2 _1.8V
C1
DOUT+
DOUT-
C2
Serial
FPD-Link III
Interface
MODE
1.8V
I2C
Bus
Interface
LVCMOS
Control
Interface
GPO
Control
Interface
FB3
FB4
Optional
VDDIO
PDB
GPO[0]
GPO[1]
GPO[2]
GPO[3]
RPU
RPU
SCL
SDA
C16
C17
Optional
ID[X]
RES
DAP (GND)
10 kQ
RID
NOTE:
C1 - C2 = 0.1 µF (50 WV)
C3 ± C7 = 0.01 µF
C8 - C12 = 0.1 µF
C13 - C14 = 4.7 µF
C15 = 22 µF
C16 - C17 = >100 pF
RPU = 1 kQ to 4.7 kQ
RID (see ID[x] Resistor Value Table)
FB1 - FB4: Impedance = 1 kQ (@ 100 MHz)
low DC resistance (<1Q)
The "Optional" components shown are
provisions to provide higher system noise
immunity and will therefore result in higher
performance.
Figure 49. DS90UB913A-Q1 Typical Connection Diagram — Pin Control (STP)
Figure 50 shows a typical connection using an STP interface to the DS90UB914A-Q1 Deserializer.
Copyright © 2013, Texas Instruments Incorporated
Submit Documentation Feedback
59
Product Folder Links: DS90UB913A-Q1 DS90UB914A-Q1