DS90UB914ATRHSTQ1 Datasheet, PDF (42/68 Pages) Texas Instruments – DS90UB913A-Q1/DS90UB914A-Q1 25 to100 MHz 10/12-Bit

DS90UB913A-Q1, DS90UB914A-Q1
SNLS443A – MAY 2013 – REVISED JUNE 2013
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Serializer
Image
Sensor
Camera Data
10 or 12
DATA
HSYNC
VSYNC
Pixel Clock
SDA
SCL
2
GPO[1:0]
DIN[11:0] or
DIN[9:0]
HSYNC,
VSYNC
PCLK
SDA
SCL
GPO[1:0]
Camera Unit
Reference Clock
(Ext. OSC/2)
GPO3
External
Oscillator
PLL
÷2
GPO2
FPD Link III-
High Speed
DOUT+
RIN+
DOUT-
RIN-
Bi-Directional
Control Channel
Deserializer
ROUT[11:0]
or
ROUT[9:0]
HSYNC,
VSYNC
PCLK
Camera Data
10 or 12
DATA
HSYNC
VSYNC
Pixel Clock
GPIO[3:0]
SDA
SCL
4
GPO[3:0]
SDA
SCL
ECU Module
Microcontroller
Figure 26. DS90UB913A-Q1/914A-Q1 Operation in the External Oscillator Mode
When the DS90UB913A-Q1 device is operated using an external oscillator, the GPO3 pin on the DS90UB913A-
Q1 is the input pin for the external oscillator. In applications where the DS90UB913A-Q1 device is operated from
an external oscillator, the divide-by-2 circuit in the DS90UB913A-Q1 device feeds back the divided clock output
to the imager device through GPO2 pin. The pixel clock to external oscillator ratios needs to be fixed for the
12–bit high frequency mode and the 10–bit mode. In the 10-bit mode, the pixel clock frequency divided by
the external oscillator frequency must be 2. In the 12-bit high frequency mode, the pixel clock frequency
divided by the external oscillator frequency must be 1.5. For example, if the external oscillator frequency is
48MHz in the 10–bit mode, the pixel clock frequency of the imager needs to be twice of the external oscillator
frequency, i.e. 96MHz. If the external oscillator frequency is 48MHz in the 12-bit high frequency mode, the pixel
clock frequency of the imager needs to be 1.5 times of the external oscillator frequency, i.e. 72MHz. In this
mode, GPO2 and GPO3 on the Serializer cannot act as the output of the input signal coming from GPIO2 or
GPIO3 on the Deserializer.
DS90UB913A/914A Operation with Pixel Clock from Imager as Reference Clock
The DS90UB913A/914A chipsets can be operated by using the pixel clock from the imager as the reference
clock. Figure 27 shows the operation of the DS90UB913A/914A chipsets using the pixel clock from the imager. If
the DS90UB913A-Q1 device is operated using the pixel clock from the imager as the reference clock, then the
imager uses an external oscillator as its reference clock. There are 4 GPIOs available in this mode (PCLK from
imager mode).
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