DS90UB914ATRHSTQ1 Datasheet, PDF (17/68 Pages) Texas Instruments – DS90UB913A-Q1/DS90UB914A-Q1 25 to100 MHz 10/12-Bit

DS90UB913A-Q1, DS90UB914A-Q1
www.ti.com
SNLS443A – MAY 2013 – REVISED JUNE 2013
ELECTRICAL CHARACTERISTICS ^{(1) (2) (3)}
DESERIALIZER SWITCHING CHARACTERISTICS
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
Pin/Freq.
Min
t_RCP
Receiver Output
10–bit mode
PCLK
Clock Period
12–bit high frequency mode
(Figure 20)
10
13.33
12–bit low frequency mode
10
t_PDC
PCLK Duty Cycle 10–bit mode
PCLK
45
12–bit high frequency mode
40
12–bit low frequency mode
40
t_CLH
LVCMOS Low-to- V_DDIO: 1.71V to 1.89V or 3.0V PCLK
High Transition Time to 3.6V,
1.3
t_CHL
LVCMOS High-to-
Low Transition Time
C_L = 8 pF (lumped load)
Default Registers
(Figure 18 ), ⁽⁴⁾
1.3
t_CLH
LVCMOS Low-to- V_DDIO: 1.71V to 1.89V or 3.0V ROUT[11:0], HS, VS
High Transition Time to 3.6V,
1
t_CHL
LVCMOS High-to-
Low Transition Time
C_L = 8 pF (lumped load)
Default Registers
(Figure 18 ) ,⁽⁴⁾
1
t_ROS
ROUT Setup Data to V_DDIO: 1.71V to 1.89V or 3.0V ROUT[11:0], HS, VS
PCLK
to 3.6V,
t_ROH
ROUT Hold Data to
PCLK
C_L = 8 pF (lumped load)
Default Registers (Figure 20)
0.38T
0.38T
10–bit mode
154T
t_DD
Default Registers
12–bit low frequency
Deserializer Delay Register 0x03h b[0] (RRFB = 1) mode
109T
(Figure 19),⁽⁴⁾
12–bit high frequency
mode
73T
t_DDLT
Deserializer Data
Lock Time
With Adaptive Equalization
(Figure 17)
10–bit mode
12–bit low frequency
mode
12–bit high frequency
mode
t_RCJ
Receiver Clock Jitter PCLK
SSCG[3:0] = OFF
(4)
10–bit mode
PCLK = 100 MHz
12–bit low frequency
mode
PCLK = 50 MHz
12–bit high frequency
mode
PCLK = 75 MHz
t_DPJ
Deserializer Period PCLK
Jitter
SSCG[3:0] = OFF
(5) (4)
10–bit mode
PCLK = 100 MHz
12–bit low frequency
mode
PCLK = 50 MHz
12–bit high frequency
mode
PCLK = 75 MHz
Typ
50
50
50
2
2
2.5
2.5
0.5T
0.5T
15
15
15
20
22
45
170
180
300
Max
Units
40
40
ns
40
55
60
%
60
2.8
ns
2.8
4
ns
4
ns
158T
112T
ns
75T
22
22
ms
22
30
35
ps
90
815
330
ps
515
(1) The Electrical Characteristics tables list verified specifications under the listed Recommended Operating Conditions except as otherwise
modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not
verified.
(2) Current into device pins is defined as positive. Current out of a device pin is defined as negative. Voltages are referenced to ground
except VOD, ΔVOD, VTH and VTL which are differential voltages.
(3) Typical values represent most likely parametric norms at 1.8V or 3.3V, T_A = +25°C, and at the Recommended Operation Conditions at
the time of product characterization and are not verified.
(4) Specification is verified by characterization and is not tested in production.
(5) t_DPJ is the maximum amount the period is allowed to deviate measured over 30,000 samples.
Copyright © 2013, Texas Instruments Incorporated
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