DS90UB914ATRHSTQ1 Datasheet, PDF (40/68 Pages) Texas Instruments – DS90UB913A-Q1/DS90UB914A-Q1 25 to100 MHz 10/12-Bit

DS90UB913A-Q1, DS90UB914A-Q1
SNLS443A – MAY 2013 – REVISED JUNE 2013
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Addr
(Hex)
0x4D
Name
AEQ Test Mode
Select
0x4E EQ Value
Table 4. DS90UB914A-Q1 Control Registers (continued)
Bits
Field
R/W
7 RSVD
6 ^{AEQ Bypass}
RW
5:0 RSVD
AEQ / Manual Eq
Readback
7:0
R
Default
0
0x_F
Description
Reserved.
Bypass AEQ and use set manual EQ value
using register 0x04.
Reserved.
Read back the adaptive and manual
Equalization value EQ level:
0000 = ~8.0dB (minimum)
0001 = ~11.0dB
0011 = ~12.5dB
0111 = ~14.0dB
1111 = ~16.0dB (maximum)
Table 5. Clock Sources for Forward Channel Frame on the Serializer During Normal Operation
DS90UB913A-Q1
Reg 0x14 [2:1]
00
01
10
11
10–bit
Mode
50 MHz
100 MHz
50 MHz
25MHz
12–bit
High Frequency Mode
37.5 MHz
75 MHz
37.5 MHz
-
12–bit
Low Frequency Mode
25 MHz
50 MHz
25 MHz
-
DS90UB914A-Q1
Reg 0x24 [2:1]
00
01
10
11
Table 6. BIST Clock Sources
10–bit
Mode
PCLK
100 MHz
50 MHz
25MHz
12–bit
High Frequency Mode
PCLK
75 MHz
37.5 MHz
-
12–bit
Low Frequency Mode
PCLK
50 MHz
25 MHz
-
40
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