DS90UB914ATRHSTQ1 Datasheet, PDF (57/68 Pages) Texas Instruments – DS90UB913A-Q1/DS90UB914A-Q1 25 to100 MHz 10/12-Bit

DS90UB913A-Q1, DS90UB914A-Q1
www.ti.com
SNLS443A – MAY 2013 – REVISED JUNE 2013
VDDIO
DS90UB913AQ (SER)
1.8V
C3
C8
LVCMOS
Parallel
Bus
1.8V
10 kQ
RID
VDDIO
DIN0
DIN1
DIN2
DIN3
DIN4
DIN5
DIN6
DIN7
DIN8
DIN9
DIN10
DIN11
HS
VS
PCLK
MODE
I2C
Bus
Interface
LVCMOS
Control
Interface
GPO
Control
Interface
FB3
FB4
Optional
VDDIO
PDB
GPO[0]
GPO[1]
GPO[2]
GPO[3]
RPU
RPU
SCL
SDA
C16
C17
Optional
VDDT
C4
C9
VDDPLL
C5 C10
C14
VDDCML
C6 C11 C15
VDDD
C7 C12
C13
1.8V
FB1
1.8V
FB2 _1.8V
DOUT+
DOUT-
ID[X]
RES
DAP (GND)
C1
C2
1.8V
RTERM
Serial
FPD-Link III
Interface
10 kQ
RID
NOTE:
C1 = 0.1 µF (50 WV)
C2 = 0.047 µF (50 WV)
C3 ± C7 = 0.01 µF
C8 - C12 = 0.1 µF
C13 - C14 = 4.7 µF
C15 = 22 µF
C16 - C17 = >100 pF
RTERM = 50Ÿ
RPU = 1 kŸ to 4.7 kŸ
RID (see ID[x] Resistor Value Table)
FB1 - FB4: Impedance = 1 kŸ (@ 100 MHz)
low DC resistance (<1Ÿ)
The "Optional" components shown are
provisions to provide higher system noise
immunity and will therefore result in higher
performance.
Figure 47. DS90UB913A-Q1 Typical Connection Diagram — Pin Control (Coax)
Figure 48 shows a typical connection using a Coax interface to the DS90UB914A-Q1 Deserializer.
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