DS90UB913Q_13 Datasheet, PDF (44/63 Pages) TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS – DS90UB913Q/DS90UB914Q 10-100MHz 10/12- Bit DC-Balanced FPD-Link III Serializer and Deserializer with Bidirectional Control Channel

DS90UB913Q, DS90UB914Q
SNLS420B – JULY 2012 – REVISED APRIL 2013
HOST
SCL
SDA
1.8V
V_DDIO
RPU
RPU
10k
ID[x]
R_ID
DS90UB913Q
SCL
SDA
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To other Devices
Figure 34. ID[x] Address Decoder on the Serializer
Resistor RID0 Ω
(1% Tolerance)
0k
2k
4.7k
8.2k
14k
100k
Table 7. ID[x] Resistor Value for DS90UB913Q Serializer
ID[x] Resistor Value — DS90UB913Q Serializer
Address 7'b
Address 8'b 0 appended (WRITE)
0x58
0x59
0x5A
0x5B
0x5C
0x5D
0xB0
0xB2
0xB4
0xB6
0xB8
0xBA
ID[x] Address Decoder on the Deserializer
The IDx[0] and IDx[1] pins on the Deserializer are used to decode and set the physical slave address of the
Deserializer (I2C only) to allow up to 16 devices on the bus using only two pins. The pins set one of 16 possible
addresses for each Deserializer device. As there will be more Deserializer devices connected on the same board
than Serializers, more I2C device addresses have been defined for the DS90UB914Q Deserializer than the
DSDS90UB913Q Serializer. The pins must be pulled to VDD (1.8V, not VDDIO) with a 10 kΩ resistor and two
pull down resistors (RID0 and RID1) of the recommended value to set the physical device address. The
recommended maximum resistor tolerance is 1%.
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